Enum s32k144::pmc::regsc::ClkbiasdisR

pub enum ClkbiasdisR {
    _0,
    _1,
}

Possible values of the field CLKBIASDIS

Variants

_0

No effect

_1

In VLPS mode, the bias currents and reference voltages for the following clock modules are disabled: SIRC, FIRC, PLL. (if available on device)

Methods

impl ClkbiasdisR

fn bits(&self) -> u8

Value of the field as raw bits

fn is_0(&self) -> bool

Checks if the value of the field is _0

fn is_1(&self) -> bool

Checks if the value of the field is _1

Trait Implementations

impl Clone for ClkbiasdisR

fn clone(&self) -> ClkbiasdisR

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for ClkbiasdisR

impl Debug for ClkbiasdisR

fn fmt(&self, __arg_0: &mut Formatter) -> Result

Formats the value using the given formatter.

impl PartialEq for ClkbiasdisR

fn eq(&self, __arg_0: &ClkbiasdisR) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.