Struct s32k144::lmem::lmem_pcccr::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

fn bits(&self) -> u32

Value of the register as raw bits

fn encache(&self) -> EncacheR

Bit 0 - Cache enable

fn pccr2(&self) -> Pccr2R

Bit 2 - Forces all cacheable spaces to write through

fn pccr3(&self) -> Pccr3R

Bit 3 - Forces no allocation on cache misses (must also have PCCR2 asserted)

fn invw0(&self) -> Invw0R

Bit 24 - Invalidate Way 0

fn pushw0(&self) -> Pushw0R

Bit 25 - Push Way 0

fn invw1(&self) -> Invw1R

Bit 26 - Invalidate Way 1

fn pushw1(&self) -> Pushw1R

Bit 27 - Push Way 1

fn go(&self) -> GoR

Bit 31 - Initiate Cache Command