[−][src]Module rv32m1_ri5cy_pac::lpuart1::stat

LPUART Status Register

Structs

BRK13_W	Write proxy for field `BRK13`
FE_W	Write proxy for field `FE`
IDLE_W	Write proxy for field `IDLE`
LBKDE_W	Write proxy for field `LBKDE`
LBKDIF_W	Write proxy for field `LBKDIF`
MA1F_W	Write proxy for field `MA1F`
MA2F_W	Write proxy for field `MA2F`
MSBF_W	Write proxy for field `MSBF`
NF_W	Write proxy for field `NF`
OR_W	Write proxy for field `OR`
PF_W	Write proxy for field `PF`
RWUID_W	Write proxy for field `RWUID`
RXEDGIF_W	Write proxy for field `RXEDGIF`
RXINV_W	Write proxy for field `RXINV`

BRK13_A	Break Character Generation Length
FE_A	Framing Error Flag
IDLE_A	Idle Line Flag
LBKDE_A	LIN Break Detection Enable
LBKDIF_A	LIN Break Detect Interrupt Flag
MA1F_A	Match 1 Flag
MA2F_A	Match 2 Flag
MSBF_A	MSB First
NF_A	Noise Flag
OR_A	Receiver Overrun Flag
PF_A	Parity Error Flag
RAF_A	Receiver Active Flag
RDRF_A	Receive Data Register Full Flag
RWUID_A	Receive Wake Up Idle Detect
RXEDGIF_A	RXD Pin Active Edge Interrupt Flag
RXINV_A	Receive Data Inversion
TC_A	Transmission Complete Flag
TDRE_A	Transmit Data Register Empty Flag