1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
/*********************************************************************************************************************** * Copyright (c) 2019 by the authors * * Author: André Borrmann * License: Apache License 2.0 **********************************************************************************************************************/ #![doc(html_root_url = "https://docs.rs/ruspiro-interrupt-core/0.2.0")] #![no_std] #![feature(asm)] //! # Interrupt Core functions //! //! Core functions to enable/disable interupts globally. This is splitted from the //! [``ruspiro-interrupt``](https://crates.io/crates/ruspiro-interrupt) crate to remove circular dependencies between //! the interrupt crate others (e.g. ``ruspiro-singleton``) crate. use core::sync::atomic::{AtomicBool, Ordering}; // last IRQ state before globally disabling interrupts static IRQ_STATE: AtomicBool = AtomicBool::new(false); // last FAULT/FIQ state before globally disabling fast interrupts static FAULT_STATE: AtomicBool = AtomicBool::new(false); /// globally enabling interrupts (IRQ/FIQ) to be triggered pub fn enable_interrupts() { enable_irq(); enable_fiq(); } /// globally disabling interrupts (IRQ/FIQ) from beeing triggered pub fn disable_interrupts() { disable_irq(); disable_fiq(); } /// globally re-enabling interrupts (IRQ/FIQ) to be triggered. This is done based on the global state /// that was set before the interrupts were disable using the [``disable_interrupts``] function. pub fn re_enable_interrupts() { re_enable_irq(); re_enable_fiq(); } /// globally enable ``IRQ`` interrupts to be triggered pub fn enable_irq() { #[cfg(target_arch="arm")] unsafe { asm!("cpsie i isb") // as per ARM spec the ISB ensures triggering pending interrupts }; } /// globally re-enabe ``IRQ`` interrupts to be triggered based on the global state that was set before disabling IRQ /// interrupts wihin the [``disable_irq``] function. pub fn re_enable_irq() { // re-enable interrupts if they have been enabled prior to disabling let state = IRQ_STATE.load(Ordering::SeqCst); if state { #[cfg(target_arch="arm")] unsafe { asm!("cpsie i isb") // as per ARM spec the ISB ensures triggering pending interrupts }; } } /// globally enable ``FIQ`` interrupts to be triggered pub fn enable_fiq() { #[cfg(target_arch="arm")] unsafe { asm!("cpsie f isb") // as per ARM spec the ISB ensures triggering pending interrupts }; } /// globally re-enabe ``FIQ`` interrupts to be triggered based on the global state that was set before disabling FIQ /// interrupts wihin the [``disable_fiq``] function. pub fn re_enable_fiq() { // re-enable interrupts if they have been enabled prior to disabling let state = FAULT_STATE.load(Ordering::SeqCst); if state { #[cfg(target_arch="arm")] unsafe { asm!("cpsie f isb") // as per ARM spec the ISB ensures triggering pending interrupts }; } } /// globally disable ``IRQ`` interrupts from beeing triggered. This function stores the state of the current enabling/disabling /// of interrupts. If ``disable`` is called multiple times after each other this will than ultimately store "disabled" as /// last state. In this case a previous enabled state (before the multiple calls) is not able to recover with a call to [``re_enable_irq``]. pub fn disable_irq() { // remember the last IRQ state let state = get_interrupt_state(); #[cfg(target_arch="arm")] unsafe { asm!("cpsid i") }; // store the last interrupt state after interrupts have been // disabled to ensure interrupt free atomic operation IRQ_STATE.store(state != 0, Ordering::SeqCst); } /// globally disable ``FIQ`` interrupts from beeing triggered. This function stores the state of the current enabling/disabling /// of interrupts. If ``disable`` is called multiple times after each other this will than ultimately store "disabled" as /// last state. In this case a previous enabled state (before the multiple calls) is not able to recover with a call to [``re_enable_fiq``]. pub fn disable_fiq() { // remember the last FIQ state let state = get_fault_state(); #[cfg(target_arch="arm")] unsafe { asm!("cpsid f") }; // store the last interrupt state after interrupts have been // disabled to ensure interrupt free atomic operation FAULT_STATE.store(state != 0, Ordering::SeqCst); } #[allow(unreachable_code)] fn get_interrupt_state() -> u32 { #[cfg(target_arch="arm")] unsafe { let state: u32; asm!("MRS $0, CPSR":"=r"(state):::"volatile"); return state & 0x80; } // for non ARM targets there is nothing implemented to get current IRQ state, so return 0 0 } #[allow(unreachable_code)] fn get_fault_state() -> u32 { #[cfg(target_arch="arm")] unsafe { let state: u32; asm!("MRS $0, CPSR":"=r"(state):::"volatile"); return state & 0x40; } // for non ARM targets there is nothing implemented to get current IRQ state, so return 0 0 }