Trait ruduino::modules::HardwareUsart[−][src]

pub trait HardwareUsart {
    type DataRegister: Register<T = u8>;
    type ControlRegisterA: Register<T = u8>;
    type ControlRegisterB: Register<T = u8>;
    type ControlRegisterC: Register<T = u8>;
    type BaudRateRegister: Register<T = u16>;
}

Associated Types

type DataRegister: Register<T = u8>[src]

The USART data register.

type ControlRegisterA: Register<T = u8>[src]

USART control and status register A.

type ControlRegisterB: Register<T = u8>[src]

USART control and status register B.

type ControlRegisterC: Register<T = u8>[src]

USART control and status register C.

type BaudRateRegister: Register<T = u16>[src]

USART baud rate register.

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Implementors

impl HardwareUsart for ruduino::cores::atmega48::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega48a::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega48p::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega48pa::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega88::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega88a::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega88p::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega88pa::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega168::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega168a::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega168p::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega168pa::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega328::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

impl HardwareUsart for ruduino::cores::atmega328p::USART0[src]

type DataRegister = UDR0

type ControlRegisterA = UCSR0A

type ControlRegisterB = UCSR0B

type ControlRegisterC = UCSR0C

type BaudRateRegister = UBRR0

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