[−][src]Module rsl10_pac::clk
Clock Generation
Modules
| clk_det_cfg | External clock detector configuration register (including interrupt) |
| clk_det_status | External clock detector status register |
| clk_div_cfg0 | Prescale register for SLOWCLK, BBCLK and USRCLK clocks |
| clk_div_cfg1 | Prescale register for PWM clock, UART and DMIC clocks |
| clk_div_cfg2 | Prescale register for DC-DC converter and charge pump clocks |
| clk_sys_cfg | System Clock Configuration Register |
Structs
| RegisterBlock | Register block |
Type Definitions
| CLK_DET_CFG | External clock detector configuration register (including interrupt) |
| CLK_DET_STATUS | External clock detector status register |
| CLK_DIV_CFG0 | Prescale register for SLOWCLK, BBCLK and USRCLK clocks |
| CLK_DIV_CFG1 | Prescale register for PWM clock, UART and DMIC clocks |
| CLK_DIV_CFG2 | Prescale register for DC-DC converter and charge pump clocks |
| CLK_SYS_CFG | System Clock Configuration Register |