[−][src]Module rsl10_pac::acs::acs_wakeup_cfg

Wakeup configuration

Structs

DCDC_OVERLOAD_EN_W	Write proxy for field `DCDC_OVERLOAD_EN`
DELAY_W	Write proxy for field `DELAY`
DIO0_EN_W	Write proxy for field `DIO0_EN`
DIO0_POL_W	Write proxy for field `DIO0_POL`
DIO1_POL_W	Write proxy for field `DIO1_POL`
DIO1_EN_W	Write proxy for field `DIO1_EN`
DIO2_POL_W	Write proxy for field `DIO2_POL`
DIO2_EN_W	Write proxy for field `DIO2_EN`
DIO3_POL_W	Write proxy for field `DIO3_POL`
DIO3_EN_W	Write proxy for field `DIO3_EN`
WAKEUP_PAD_POL_W	Write proxy for field `WAKEUP_PAD_POL`

DCDC_OVERLOAD_EN_A	Enable / Disable the Wake-up functionality on the DCDC overload flag
DELAY_A	Delay from VDDC ready to digital clock enable (power of 2)
DIO0_EN_A	Enable / Disable the Wake-up functionality on the DIO0 pad
DIO0_POL_A	Wake-up polarity on the DIO0 pad
DIO1_POL_A	Wake-up polarity on the DIO1 pad
DIO1_EN_A	Enable / Disable the Wake-up functionality on the DIO1 pad
DIO2_POL_A	Wake-up polarity on the DIO2 pad
DIO2_EN_A	Enable / Disable the Wake-up functionality on the DIO2 pad
DIO3_POL_A	Wake-up polarity on the DIO3 pad
DIO3_EN_A	Enable / Disable the Wake-up functionality on the DIO3 pad
WAKEUP_PAD_POL_A	Wake-up polarity on the WAKEUP pad

DCDC_OVERLOAD_EN_R	Reader of field `DCDC_OVERLOAD_EN`
DELAY_R	Reader of field `DELAY`
DIO0_EN_R	Reader of field `DIO0_EN`
DIO0_POL_R	Reader of field `DIO0_POL`
DIO1_POL_R	Reader of field `DIO1_POL`
DIO1_EN_R	Reader of field `DIO1_EN`
DIO2_POL_R	Reader of field `DIO2_POL`
DIO2_EN_R	Reader of field `DIO2_EN`
DIO3_POL_R	Reader of field `DIO3_POL`
DIO3_EN_R	Reader of field `DIO3_EN`
R	Reader of register ACS_WAKEUP_CFG
W	Writer for register ACS_WAKEUP_CFG
WAKEUP_PAD_POL_R	Reader of field `WAKEUP_PAD_POL`