[−][src]Module rsl10_pac::rf::rf_reg26

REG26

Structs

BIAS_10_IQ_BB_7_W	Write proxy for field `BIAS_10_IQ_BB_7`
BIAS_10_IQ_BB_8_W	Write proxy for field `BIAS_10_IQ_BB_8`
BIAS_11_LNA_AGC_BIAS_0_W	Write proxy for field `BIAS_11_LNA_AGC_BIAS_0`
BIAS_11_LNA_AGC_BIAS_1_W	Write proxy for field `BIAS_11_LNA_AGC_BIAS_1`
BIAS_12_LNA_AGC_BIAS_2_W	Write proxy for field `BIAS_12_LNA_AGC_BIAS_2`
BIAS_12_LNA_AGC_BIAS_3_W	Write proxy for field `BIAS_12_LNA_AGC_BIAS_3`
SD_MASH_MASH_DITHER_W	Write proxy for field `SD_MASH_MASH_DITHER`
SD_MASH_MASH_ENABLE_W	Write proxy for field `SD_MASH_MASH_ENABLE`
SD_MASH_MASH_ORDER_W	Write proxy for field `SD_MASH_MASH_ORDER`
SD_MASH_MASH_RSTB_W	Write proxy for field `SD_MASH_MASH_RSTB`

BIAS_10_IQ_BB_7_A	Peak detector threshold bias 2
BIAS_10_IQ_BB_8_A	Peak detector threshold bias 1
BIAS_11_LNA_AGC_BIAS_0_A	LNA bias for AGC lvl 0
BIAS_11_LNA_AGC_BIAS_1_A	LNA bias for AGC lvl 1
BIAS_12_LNA_AGC_BIAS_2_A	LNA bias for AGC lvl 2
BIAS_12_LNA_AGC_BIAS_3_A	LNA bias for AGC lvl 3
SD_MASH_MASH_DITHER_A	Enable dithering on the sigma delta mash
SD_MASH_MASH_ENABLE_A	Enable the sigma delta mash
SD_MASH_MASH_ORDER_A	Order of the sigma delta mash
SD_MASH_MASH_RSTB_A	Reset of the sigma delta mash (active low)

BIAS_10_IQ_BB_7_R	Reader of field `BIAS_10_IQ_BB_7`
BIAS_10_IQ_BB_8_R	Reader of field `BIAS_10_IQ_BB_8`
BIAS_11_LNA_AGC_BIAS_0_R	Reader of field `BIAS_11_LNA_AGC_BIAS_0`
BIAS_11_LNA_AGC_BIAS_1_R	Reader of field `BIAS_11_LNA_AGC_BIAS_1`
BIAS_12_LNA_AGC_BIAS_2_R	Reader of field `BIAS_12_LNA_AGC_BIAS_2`
BIAS_12_LNA_AGC_BIAS_3_R	Reader of field `BIAS_12_LNA_AGC_BIAS_3`
R	Reader of register RF_REG26
SD_MASH_MASH_DITHER_R	Reader of field `SD_MASH_MASH_DITHER`
SD_MASH_MASH_ENABLE_R	Reader of field `SD_MASH_MASH_ENABLE`
SD_MASH_MASH_ORDER_R	Reader of field `SD_MASH_MASH_ORDER`
SD_MASH_MASH_RSTB_R	Reader of field `SD_MASH_MASH_RSTB`
W	Writer for register RF_REG26