[][src]Type Definition rp2040::dma::CH11_TRANS_COUNT

type CH11_TRANS_COUNT = Reg<u32, _CH11_TRANS_COUNT>;

DMA Channel 11 Transfer Count\n Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).\n\n When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.\n\n Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.\n\n The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see ch11_trans_count module

Trait Implementations

impl Readable for CH11_TRANS_COUNT[src]

read() method returns ch11_trans_count::R reader structure

impl ResetValue for CH11_TRANS_COUNT[src]

Register CH11_TRANS_COUNT reset()'s with value 0

type Type = u32

Register size

impl Writable for CH11_TRANS_COUNT[src]

write(|w| ..) method takes ch11_trans_count::W writer structure