riscv 0.5.6

Low level access to RISC-V processors
Documentation 
[package]
name = "riscv"
version = "0.5.6"
repository = "https://github.com/rust-embedded/riscv"
authors = ["The RISC-V Team <risc-v@teams.rust-embedded.org>"]
categories = ["embedded", "hardware-support", "no-std"]
description = "Low level access to RISC-V processors"
keywords = ["riscv", "register", "peripheral"]
license = "ISC"

[dependencies]
bare-metal = ">=0.2.0,<0.2.5"
bit_field = "0.9.0"

[features]
inline-asm = []