1#[doc = "Register `USBCKCR` reader"]
2pub struct R(crate::R<USBCKCR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<USBCKCR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<USBCKCR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<USBCKCR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `USBCKCR` writer"]
17pub struct W(crate::W<USBCKCR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<USBCKCR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<USBCKCR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<USBCKCR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `USBCKSEL` reader - USB Clock (USBCLK) Source Select"]
38pub type USBCKSEL_R = crate::FieldReader<u8, USBCKSEL_A>;
39#[doc = "USB Clock (USBCLK) Source Select\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum USBCKSEL_A {
43 #[doc = "5: PLL"]
44 _101 = 5,
45 #[doc = "6: PLL2"]
46 _110 = 6,
47}
48impl From<USBCKSEL_A> for u8 {
49 #[inline(always)]
50 fn from(variant: USBCKSEL_A) -> Self {
51 variant as _
52 }
53}
54impl USBCKSEL_R {
55 #[doc = "Get enumerated values variant"]
56 #[inline(always)]
57 pub fn variant(&self) -> Option<USBCKSEL_A> {
58 match self.bits {
59 5 => Some(USBCKSEL_A::_101),
60 6 => Some(USBCKSEL_A::_110),
61 _ => None,
62 }
63 }
64 #[doc = "Checks if the value of the field is `_101`"]
65 #[inline(always)]
66 pub fn is_101(&self) -> bool {
67 *self == USBCKSEL_A::_101
68 }
69 #[doc = "Checks if the value of the field is `_110`"]
70 #[inline(always)]
71 pub fn is_110(&self) -> bool {
72 *self == USBCKSEL_A::_110
73 }
74}
75#[doc = "Field `USBCKSEL` writer - USB Clock (USBCLK) Source Select"]
76pub type USBCKSEL_W<'a, const O: u8> =
77 crate::FieldWriter<'a, u8, USBCKCR_SPEC, u8, USBCKSEL_A, 3, O>;
78impl<'a, const O: u8> USBCKSEL_W<'a, O> {
79 #[doc = "PLL"]
80 #[inline(always)]
81 pub fn _101(self) -> &'a mut W {
82 self.variant(USBCKSEL_A::_101)
83 }
84 #[doc = "PLL2"]
85 #[inline(always)]
86 pub fn _110(self) -> &'a mut W {
87 self.variant(USBCKSEL_A::_110)
88 }
89}
90#[doc = "Field `USBCKSREQ` reader - USB Clock (USBCLK) Switching Request"]
91pub type USBCKSREQ_R = crate::BitReader<USBCKSREQ_A>;
92#[doc = "USB Clock (USBCLK) Switching Request\n\nValue on reset: 0"]
93#[derive(Clone, Copy, Debug, PartialEq, Eq)]
94pub enum USBCKSREQ_A {
95 #[doc = "0: No request"]
96 _0 = 0,
97 #[doc = "1: Request switching."]
98 _1 = 1,
99}
100impl From<USBCKSREQ_A> for bool {
101 #[inline(always)]
102 fn from(variant: USBCKSREQ_A) -> Self {
103 variant as u8 != 0
104 }
105}
106impl USBCKSREQ_R {
107 #[doc = "Get enumerated values variant"]
108 #[inline(always)]
109 pub fn variant(&self) -> USBCKSREQ_A {
110 match self.bits {
111 false => USBCKSREQ_A::_0,
112 true => USBCKSREQ_A::_1,
113 }
114 }
115 #[doc = "Checks if the value of the field is `_0`"]
116 #[inline(always)]
117 pub fn is_0(&self) -> bool {
118 *self == USBCKSREQ_A::_0
119 }
120 #[doc = "Checks if the value of the field is `_1`"]
121 #[inline(always)]
122 pub fn is_1(&self) -> bool {
123 *self == USBCKSREQ_A::_1
124 }
125}
126#[doc = "Field `USBCKSREQ` writer - USB Clock (USBCLK) Switching Request"]
127pub type USBCKSREQ_W<'a, const O: u8> = crate::BitWriter<'a, u8, USBCKCR_SPEC, USBCKSREQ_A, O>;
128impl<'a, const O: u8> USBCKSREQ_W<'a, O> {
129 #[doc = "No request"]
130 #[inline(always)]
131 pub fn _0(self) -> &'a mut W {
132 self.variant(USBCKSREQ_A::_0)
133 }
134 #[doc = "Request switching."]
135 #[inline(always)]
136 pub fn _1(self) -> &'a mut W {
137 self.variant(USBCKSREQ_A::_1)
138 }
139}
140#[doc = "Field `USBCKSRDY` reader - USB Clock (USBCLK) Switching Ready state flag"]
141pub type USBCKSRDY_R = crate::BitReader<USBCKSRDY_A>;
142#[doc = "USB Clock (USBCLK) Switching Ready state flag\n\nValue on reset: 0"]
143#[derive(Clone, Copy, Debug, PartialEq, Eq)]
144pub enum USBCKSRDY_A {
145 #[doc = "0: Impossible to Switch"]
146 _0 = 0,
147 #[doc = "1: Possible to Switch"]
148 _1 = 1,
149}
150impl From<USBCKSRDY_A> for bool {
151 #[inline(always)]
152 fn from(variant: USBCKSRDY_A) -> Self {
153 variant as u8 != 0
154 }
155}
156impl USBCKSRDY_R {
157 #[doc = "Get enumerated values variant"]
158 #[inline(always)]
159 pub fn variant(&self) -> USBCKSRDY_A {
160 match self.bits {
161 false => USBCKSRDY_A::_0,
162 true => USBCKSRDY_A::_1,
163 }
164 }
165 #[doc = "Checks if the value of the field is `_0`"]
166 #[inline(always)]
167 pub fn is_0(&self) -> bool {
168 *self == USBCKSRDY_A::_0
169 }
170 #[doc = "Checks if the value of the field is `_1`"]
171 #[inline(always)]
172 pub fn is_1(&self) -> bool {
173 *self == USBCKSRDY_A::_1
174 }
175}
176impl R {
177 #[doc = "Bits 0:2 - USB Clock (USBCLK) Source Select"]
178 #[inline(always)]
179 pub fn usbcksel(&self) -> USBCKSEL_R {
180 USBCKSEL_R::new(self.bits & 7)
181 }
182 #[doc = "Bit 6 - USB Clock (USBCLK) Switching Request"]
183 #[inline(always)]
184 pub fn usbcksreq(&self) -> USBCKSREQ_R {
185 USBCKSREQ_R::new(((self.bits >> 6) & 1) != 0)
186 }
187 #[doc = "Bit 7 - USB Clock (USBCLK) Switching Ready state flag"]
188 #[inline(always)]
189 pub fn usbcksrdy(&self) -> USBCKSRDY_R {
190 USBCKSRDY_R::new(((self.bits >> 7) & 1) != 0)
191 }
192}
193impl W {
194 #[doc = "Bits 0:2 - USB Clock (USBCLK) Source Select"]
195 #[inline(always)]
196 #[must_use]
197 pub fn usbcksel(&mut self) -> USBCKSEL_W<0> {
198 USBCKSEL_W::new(self)
199 }
200 #[doc = "Bit 6 - USB Clock (USBCLK) Switching Request"]
201 #[inline(always)]
202 #[must_use]
203 pub fn usbcksreq(&mut self) -> USBCKSREQ_W<6> {
204 USBCKSREQ_W::new(self)
205 }
206 #[doc = "Writes raw bits to the register."]
207 #[inline(always)]
208 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
209 self.0.bits(bits);
210 self
211 }
212}
213#[doc = "USB Clock Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usbckcr](index.html) module"]
214pub struct USBCKCR_SPEC;
215impl crate::RegisterSpec for USBCKCR_SPEC {
216 type Ux = u8;
217}
218#[doc = "`read()` method returns [usbckcr::R](R) reader structure"]
219impl crate::Readable for USBCKCR_SPEC {
220 type Reader = R;
221}
222#[doc = "`write(|w| ..)` method takes [usbckcr::W](W) writer structure"]
223impl crate::Writable for USBCKCR_SPEC {
224 type Writer = W;
225 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
226 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
227}
228#[doc = "`reset()` method sets USBCKCR to value 0x01"]
229impl crate::Resettable for USBCKCR_SPEC {
230 const RESET_VALUE: Self::Ux = 0x01;
231}