Expand description
Arm Cortex-M33 based Microcontroller RA6E1 group
Re-exports§
Modules§
- adc120
- agt0
- bus
- cac
- cache
- can0
- common
- cpscu
- crc
- dac12
- dbg
- dma
- dmac0
- doc
- dtc
- edmac0
- elc
- etherc0
- faci
- fcache
- flad
- gpt164
- gpt321
- icu
- iic0
- iic0wu
- interrupt_
handlers - iwdt
- mstp
- pfs
- poeg
- port0
- port1
- pscu
- qspi
- rmpu
- rtc
- sci0
- sci1
- sci2
- sci3
- sdhi0
- spi0
- sram
- ssie0
- sysc
- tzf
- usbfs
- wdt
Structs§
- Adc120
- Agt0
- Bus
- CBP
- Cache and branch predictor maintenance operations
- CPUID
- CPUID
- Cac
- Cache
- Can0
- Core
Peripherals - Core peripherals
- Cpscu
- Crc
- DCB
- Debug Control Block
- DWT
- Data Watchpoint and Trace unit
- Dac12
- Dbg
- Dma
- Dmac0
- Doc
- Dtc
- Edmac0
- Elc
- Etherc0
- FPB
- Flash Patch and Breakpoint unit
- FPU
- Floating Point Unit
- Faci
- Fcache
- Flad
- Gpt164
- Gpt321
- ITM
- Instrumentation Trace Macrocell
- Icu
- Iic0
- Iic0Wu
- Iwdt
- MPU
- Memory Protection Unit
- Mstp
- NVIC
- Nested Vector Interrupt Controller
- Peripherals
- Required for compatibility with RTIC and other frameworks
- Pfs
- Poeg
- Port0
- Port1
- Pscu
- Qspi
- Rmpu
- Rtc
- SCB
- System Control Block
- SYST
- SysTick: System Timer
- Sci0
- Sci1
- Sci2
- Sci3
- Sdhi0
- Spi0
- Sram
- Ssie0
- Sysc
- TPIU
- Trace Port Interface Unit
- Tzf
- Usbfs
- Wdt
Enums§
- Interrupt
- Enumeration of all the interrupts.
Constants§
- ADC120
- AGT0
- AGT1
- AGT2
- AGT3
- AGT4
- AGT5
- BUS
- CAC
- CACHE
- CAN0
- CPSCU
- CRC
- DAC12
- DBG
- DMA
- DMAC0
- DMAC1
- DMAC2
- DMAC3
- DMAC4
- DMAC5
- DMAC6
- DMAC7
- DOC
- DTC
- EDMAC0
- ELC
- ETHERC0
- FACI
- FCACHE
- FLAD
- GPT164
- GPT165
- GPT166
- GPT167
- GPT321
- GPT322
- ICU
- IIC0
- IIC0WU
- IIC1
- IWDT
- MSTP
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority
- PFS
- POEG
- PORT0
- PORT1
- PORT2
- PORT3
- PORT4
- PORT5
- PORT6
- PORT7
- PORT8
- PSCU
- QSPI
- RMPU
- RTC
- SCI0
- SCI1
- SCI2
- SCI3
- SCI4
- SCI9
- SDHI0
- SPI0
- SPI1
- SRAM
- SSIE0
- SYSC
- TZF
- USBFS
- WDT