ra2a1/ctsu/
ctsuchac1.rs

1#[doc = "Register `CTSUCHAC1` reader"]
2pub struct R(crate::R<CTSUCHAC1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTSUCHAC1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTSUCHAC1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTSUCHAC1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTSUCHAC1` writer"]
17pub struct W(crate::W<CTSUCHAC1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTSUCHAC1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTSUCHAC1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTSUCHAC1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CTSUCHAC1` reader - CTSU Channel Enable Control 1.0: Not measurement target1: Measurement targetNote: CTSUCHAC1\\[0\\]
38corresponds to TS08 and CTSUCHAC1\\[7\\]
39corresponds to TS15."]
40pub type CTSUCHAC1_R = crate::FieldReader<u8, CTSUCHAC1_A>;
41#[doc = "CTSU Channel Enable Control 1.0: Not measurement target1: Measurement targetNote: CTSUCHAC1\\[0\\]
42corresponds to TS08 and CTSUCHAC1\\[7\\]
43corresponds to TS15.\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45pub struct CTSUCHAC1_A(u8);
46impl From<CTSUCHAC1_A> for u8 {
47    #[inline(always)]
48    fn from(val: CTSUCHAC1_A) -> Self {
49        val.0 as _
50    }
51}
52#[doc = "Field `CTSUCHAC1` writer - CTSU Channel Enable Control 1.0: Not measurement target1: Measurement targetNote: CTSUCHAC1\\[0\\]
53corresponds to TS08 and CTSUCHAC1\\[7\\]
54corresponds to TS15."]
55pub type CTSUCHAC1_W<'a, const O: u8> =
56    crate::FieldWriter<'a, u8, CTSUCHAC1_SPEC, u8, CTSUCHAC1_A, 8, O>;
57impl R {
58    #[doc = "Bits 0:7 - CTSU Channel Enable Control 1.0: Not measurement target1: Measurement targetNote: CTSUCHAC1\\[0\\]
59corresponds to TS08 and CTSUCHAC1\\[7\\]
60corresponds to TS15."]
61    #[inline(always)]
62    pub fn ctsuchac1(&self) -> CTSUCHAC1_R {
63        CTSUCHAC1_R::new(self.bits)
64    }
65}
66impl W {
67    #[doc = "Bits 0:7 - CTSU Channel Enable Control 1.0: Not measurement target1: Measurement targetNote: CTSUCHAC1\\[0\\]
68corresponds to TS08 and CTSUCHAC1\\[7\\]
69corresponds to TS15."]
70    #[inline(always)]
71    #[must_use]
72    pub fn ctsuchac1(&mut self) -> CTSUCHAC1_W<0> {
73        CTSUCHAC1_W::new(self)
74    }
75    #[doc = "Writes raw bits to the register."]
76    #[inline(always)]
77    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
78        self.0.bits(bits);
79        self
80    }
81}
82#[doc = "CTSU Channel Enable Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctsuchac1](index.html) module"]
83pub struct CTSUCHAC1_SPEC;
84impl crate::RegisterSpec for CTSUCHAC1_SPEC {
85    type Ux = u8;
86}
87#[doc = "`read()` method returns [ctsuchac1::R](R) reader structure"]
88impl crate::Readable for CTSUCHAC1_SPEC {
89    type Reader = R;
90}
91#[doc = "`write(|w| ..)` method takes [ctsuchac1::W](W) writer structure"]
92impl crate::Writable for CTSUCHAC1_SPEC {
93    type Writer = W;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
96}
97#[doc = "`reset()` method sets CTSUCHAC1 to value 0"]
98impl crate::Resettable for CTSUCHAC1_SPEC {
99    const RESET_VALUE: Self::Ux = 0;
100}
ra2a1/ctsu/ctsuchac1.rs

ra2a1/ctsu/
ctsuchac1.rs
