qingke & qingke-rt
Low level access to WCH's QingKe RISC-V processors.
qingke-rt
This crate provides the runtime support for QingKe RISC-V processors.
This provides riscv
/riscv-rt
like functionality, with the following differences:
- Use vector table for interrupt handling
- Handle 1KB address alignment for the entry point(Qingke V2)
- In-SRAM code executing,
highcode
handling - PFIC support
- Conflicts with
riscv-rt
crate
Usage
!
// Or if you are using the embassy framework
async !