[−][src]Module nuc1xx::clk
Registers group
Modules
| ahbclk | AHB Devices Clock Enable Control Register |
| apbclk | APB Devices Clock Enable Control Register |
| clkdiv | Clock Divider Number Register |
| clksel0 | Clock Source Select Control Register 0 |
| clksel1 | Clock Source Select Control Register 1 |
| clksel2 | Clock Source Select Control Register 2 |
| clkstatus | Clock status monitor Register |
| frqdiv | Frequency Divider Control Register |
| pllcon | PLL Control Register |
| pwrcon | System Power Down Control Register |
Structs
| RegisterBlock | Register block |
Type Definitions
| AHBCLK | AHB Devices Clock Enable Control Register |
| APBCLK | APB Devices Clock Enable Control Register |
| CLKDIV | Clock Divider Number Register |
| CLKSEL0 | Clock Source Select Control Register 0 |
| CLKSEL1 | Clock Source Select Control Register 1 |
| CLKSEL2 | Clock Source Select Control Register 2 |
| CLKSTATUS | Clock status monitor Register |
| FRQDIV | Frequency Divider Control Register |
| PLLCON | PLL Control Register |
| PWRCON | System Power Down Control Register |