#[repr(C)]
pub struct RegisterBlock {
Show 14 fields pub tasks_out: [TASKS_OUT; 8], pub tasks_set: [TASKS_SET; 8], pub tasks_clr: [TASKS_CLR; 8], pub subscribe_out: [SUBSCRIBE_OUT; 8], pub subscribe_set: [SUBSCRIBE_SET; 8], pub subscribe_clr: [SUBSCRIBE_CLR; 8], pub events_in: [EVENTS_IN; 8], pub events_port: EVENTS_PORT, pub publish_in: [PUBLISH_IN; 8], pub publish_port: PUBLISH_PORT, pub intenset: INTENSET, pub intenclr: INTENCLR, pub latency: LATENCY, pub config: [CONFIG; 8], /* private fields */
}
Expand description

Register block

Fields

tasks_out: [TASKS_OUT; 8]

0x00..0x20 - Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.

tasks_set: [TASKS_SET; 8]

0x30..0x50 - Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.

tasks_clr: [TASKS_CLR; 8]

0x60..0x80 - Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.

subscribe_out: [SUBSCRIBE_OUT; 8]

0x80..0xa0 - Description collection: Subscribe configuration for task OUT[n]

subscribe_set: [SUBSCRIBE_SET; 8]

0xb0..0xd0 - Description collection: Subscribe configuration for task SET[n]

subscribe_clr: [SUBSCRIBE_CLR; 8]

0xe0..0x100 - Description collection: Subscribe configuration for task CLR[n]

events_in: [EVENTS_IN; 8]

0x100..0x120 - Description collection: Event generated from pin specified in CONFIG[n].PSEL

events_port: EVENTS_PORT

0x17c - Event generated from multiple input GPIO pins with SENSE mechanism enabled

publish_in: [PUBLISH_IN; 8]

0x180..0x1a0 - Description collection: Publish configuration for event IN[n]

publish_port: PUBLISH_PORT

0x1fc - Publish configuration for event PORT

intenset: INTENSET

0x304 - Enable interrupt

intenclr: INTENCLR

0x308 - Disable interrupt

latency: LATENCY

0x504 - Latency selection for Event mode (MODE=Event) with rising or falling edge detection on the pin.

config: [CONFIG; 8]

0x510..0x530 - Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event

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