Expand description

Trace and debug control

Re-exports

pub use psel::PSEL;

Modules

Start all trace and debug clocks.
Stop all trace and debug clocks.
Enable debug domain and aquire selected GPIOs
Cluster Unspecified
Clocking options for the Trace Port debug interface Reset behavior is the same as debug components

Structs

Register block

Type Definitions

CLOCKSTART (w) register accessor: an alias for Reg<CLOCKSTART_SPEC>
CLOCKSTOP (w) register accessor: an alias for Reg<CLOCKSTOP_SPEC>
ENABLE (rw) register accessor: an alias for Reg<ENABLE_SPEC>
TRACEPORTSPEED (rw) register accessor: an alias for Reg<TRACEPORTSPEED_SPEC>