Struct nrf52840_hal::pac::saadc::inten::W

pub struct W(/* private fields */);

Register INTEN writer

Implementations

impl W

pub fn started( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, STARTED_A, BitM, 0>

Bit 0 - Enable or disable interrupt for STARTED event

pub fn end(&mut self) -> BitWriterRaw<'_, u32, INTEN_SPEC, END_A, BitM, 1>

Bit 1 - Enable or disable interrupt for END event

pub fn done(&mut self) -> BitWriterRaw<'_, u32, INTEN_SPEC, DONE_A, BitM, 2>

Bit 2 - Enable or disable interrupt for DONE event

pub fn resultdone( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, RESULTDONE_A, BitM, 3>

Bit 3 - Enable or disable interrupt for RESULTDONE event

pub fn calibratedone( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CALIBRATEDONE_A, BitM, 4>

Bit 4 - Enable or disable interrupt for CALIBRATEDONE event

pub fn stopped( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, STOPPED_A, BitM, 5>

Bit 5 - Enable or disable interrupt for STOPPED event

pub fn ch0limith( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH0LIMITH_A, BitM, 6>

Bit 6 - Enable or disable interrupt for CH[0].LIMITH event

pub fn ch0limitl( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH0LIMITL_A, BitM, 7>

Bit 7 - Enable or disable interrupt for CH[0].LIMITL event

pub fn ch1limith( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH1LIMITH_A, BitM, 8>

Bit 8 - Enable or disable interrupt for CH[1].LIMITH event

pub fn ch1limitl( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH1LIMITL_A, BitM, 9>

Bit 9 - Enable or disable interrupt for CH[1].LIMITL event

pub fn ch2limith( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH2LIMITH_A, BitM, 10>

Bit 10 - Enable or disable interrupt for CH[2].LIMITH event

pub fn ch2limitl( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH2LIMITL_A, BitM, 11>

Bit 11 - Enable or disable interrupt for CH[2].LIMITL event

pub fn ch3limith( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH3LIMITH_A, BitM, 12>

Bit 12 - Enable or disable interrupt for CH[3].LIMITH event

pub fn ch3limitl( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH3LIMITL_A, BitM, 13>

Bit 13 - Enable or disable interrupt for CH[3].LIMITL event

pub fn ch4limith( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH4LIMITH_A, BitM, 14>

Bit 14 - Enable or disable interrupt for CH[4].LIMITH event

pub fn ch4limitl( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH4LIMITL_A, BitM, 15>

Bit 15 - Enable or disable interrupt for CH[4].LIMITL event

pub fn ch5limith( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH5LIMITH_A, BitM, 16>

Bit 16 - Enable or disable interrupt for CH[5].LIMITH event

pub fn ch5limitl( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH5LIMITL_A, BitM, 17>

Bit 17 - Enable or disable interrupt for CH[5].LIMITL event

pub fn ch6limith( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH6LIMITH_A, BitM, 18>

Bit 18 - Enable or disable interrupt for CH[6].LIMITH event

pub fn ch6limitl( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH6LIMITL_A, BitM, 19>

Bit 19 - Enable or disable interrupt for CH[6].LIMITL event

pub fn ch7limith( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH7LIMITH_A, BitM, 20>

Bit 20 - Enable or disable interrupt for CH[7].LIMITH event

pub fn ch7limitl( &mut self ) -> BitWriterRaw<'_, u32, INTEN_SPEC, CH7LIMITL_A, BitM, 21>

Bit 21 - Enable or disable interrupt for CH[7].LIMITL event

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<INTEN_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<INTEN_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<INTEN_SPEC>> for W

fn from(writer: W<INTEN_SPEC>) -> W

Converts to this type from the input type.