Struct nrf52840_hal::target::radio::intenclr::W

pub struct W { /* private fields */ }

Value to write to the register

Implementations

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register

pub fn ready(&mut self) -> _READYW<'_>

Bit 0 - Write ‘1’ to disable interrupt for READY event

pub fn address(&mut self) -> _ADDRESSW<'_>

Bit 1 - Write ‘1’ to disable interrupt for ADDRESS event

pub fn payload(&mut self) -> _PAYLOADW<'_>

Bit 2 - Write ‘1’ to disable interrupt for PAYLOAD event

pub fn end(&mut self) -> _ENDW<'_>

Bit 3 - Write ‘1’ to disable interrupt for END event

pub fn disabled(&mut self) -> _DISABLEDW<'_>

Bit 4 - Write ‘1’ to disable interrupt for DISABLED event

pub fn devmatch(&mut self) -> _DEVMATCHW<'_>

Bit 5 - Write ‘1’ to disable interrupt for DEVMATCH event

pub fn devmiss(&mut self) -> _DEVMISSW<'_>

Bit 6 - Write ‘1’ to disable interrupt for DEVMISS event

pub fn rssiend(&mut self) -> _RSSIENDW<'_>

Bit 7 - Write ‘1’ to disable interrupt for RSSIEND event

pub fn bcmatch(&mut self) -> _BCMATCHW<'_>

Bit 10 - Write ‘1’ to disable interrupt for BCMATCH event

pub fn crcok(&mut self) -> _CRCOKW<'_>

Bit 12 - Write ‘1’ to disable interrupt for CRCOK event

pub fn crcerror(&mut self) -> _CRCERRORW<'_>

Bit 13 - Write ‘1’ to disable interrupt for CRCERROR event

pub fn framestart(&mut self) -> _FRAMESTARTW<'_>

Bit 14 - Write ‘1’ to disable interrupt for FRAMESTART event

pub fn edend(&mut self) -> _EDENDW<'_>

Bit 15 - Write ‘1’ to disable interrupt for EDEND event

pub fn edstopped(&mut self) -> _EDSTOPPEDW<'_>

Bit 16 - Write ‘1’ to disable interrupt for EDSTOPPED event

pub fn ccaidle(&mut self) -> _CCAIDLEW<'_>

Bit 17 - Write ‘1’ to disable interrupt for CCAIDLE event

pub fn ccabusy(&mut self) -> _CCABUSYW<'_>

Bit 18 - Write ‘1’ to disable interrupt for CCABUSY event

pub fn ccastopped(&mut self) -> _CCASTOPPEDW<'_>

Bit 19 - Write ‘1’ to disable interrupt for CCASTOPPED event

pub fn rateboost(&mut self) -> _RATEBOOSTW<'_>

Bit 20 - Write ‘1’ to disable interrupt for RATEBOOST event

pub fn txready(&mut self) -> _TXREADYW<'_>

Bit 21 - Write ‘1’ to disable interrupt for TXREADY event

pub fn rxready(&mut self) -> _RXREADYW<'_>

Bit 22 - Write ‘1’ to disable interrupt for RXREADY event

pub fn mhrmatch(&mut self) -> _MHRMATCHW<'_>

Bit 23 - Write ‘1’ to disable interrupt for MHRMATCH event

pub fn phyend(&mut self) -> _PHYENDW<'_>

Bit 27 - Write ‘1’ to disable interrupt for PHYEND event