Module nrf52840_hal::pac::saadc [−][src]
Expand description
Successive approximation register (SAR) analog-to-digital converter
Modules
Register block Unspecified
Enable or disable SAADC
Calibration is complete
Register block Unspecified
A conversion task has been completed. Depending on the configuration, multiple conversions might be needed for a result to be transferred to RAM.
The SAADC has filled up the result buffer
Result ready for transfer to RAM
The SAADC has started
The SAADC has stopped
Enable or disable interrupt
Disable interrupt
Enable interrupt
Oversampling configuration. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used.
Resolution configuration
Register block RESULT EasyDMA channel
Controls normal or continuous sample rate
Status
Starts offset auto-calibration
Takes one SAADC sample
Starts the SAADC and prepares the result buffer in RAM
Stops the SAADC and terminates all on-going conversions
Structs
Type Definitions
Enable or disable SAADC
Calibration is complete
A conversion task has been completed. Depending on the configuration, multiple conversions might be needed for a result to be transferred to RAM.
The SAADC has filled up the result buffer
Result ready for transfer to RAM
The SAADC has started
The SAADC has stopped
Enable or disable interrupt
Disable interrupt
Enable interrupt
Oversampling configuration. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used.
Resolution configuration
Controls normal or continuous sample rate
Status
Starts offset auto-calibration
Takes one SAADC sample
Starts the SAADC and prepares the result buffer in RAM
Stops the SAADC and terminates all on-going conversions