pub struct R(/* private fields */);
Expand description
Register INTENSET
reader
Implementations§
source§impl R
impl R
sourcepub fn ready(&self) -> BitReaderRaw<READY_A>
pub fn ready(&self) -> BitReaderRaw<READY_A>
Bit 0 - Write ‘1’ to enable interrupt for event READY
sourcepub fn address(&self) -> BitReaderRaw<ADDRESS_A>
pub fn address(&self) -> BitReaderRaw<ADDRESS_A>
Bit 1 - Write ‘1’ to enable interrupt for event ADDRESS
sourcepub fn payload(&self) -> BitReaderRaw<PAYLOAD_A>
pub fn payload(&self) -> BitReaderRaw<PAYLOAD_A>
Bit 2 - Write ‘1’ to enable interrupt for event PAYLOAD
sourcepub fn disabled(&self) -> BitReaderRaw<DISABLED_A>
pub fn disabled(&self) -> BitReaderRaw<DISABLED_A>
Bit 4 - Write ‘1’ to enable interrupt for event DISABLED
sourcepub fn devmatch(&self) -> BitReaderRaw<DEVMATCH_A>
pub fn devmatch(&self) -> BitReaderRaw<DEVMATCH_A>
Bit 5 - Write ‘1’ to enable interrupt for event DEVMATCH
sourcepub fn devmiss(&self) -> BitReaderRaw<DEVMISS_A>
pub fn devmiss(&self) -> BitReaderRaw<DEVMISS_A>
Bit 6 - Write ‘1’ to enable interrupt for event DEVMISS
sourcepub fn rssiend(&self) -> BitReaderRaw<RSSIEND_A>
pub fn rssiend(&self) -> BitReaderRaw<RSSIEND_A>
Bit 7 - Write ‘1’ to enable interrupt for event RSSIEND
sourcepub fn bcmatch(&self) -> BitReaderRaw<BCMATCH_A>
pub fn bcmatch(&self) -> BitReaderRaw<BCMATCH_A>
Bit 10 - Write ‘1’ to enable interrupt for event BCMATCH
sourcepub fn crcok(&self) -> BitReaderRaw<CRCOK_A>
pub fn crcok(&self) -> BitReaderRaw<CRCOK_A>
Bit 12 - Write ‘1’ to enable interrupt for event CRCOK
sourcepub fn crcerror(&self) -> BitReaderRaw<CRCERROR_A>
pub fn crcerror(&self) -> BitReaderRaw<CRCERROR_A>
Bit 13 - Write ‘1’ to enable interrupt for event CRCERROR
sourcepub fn framestart(&self) -> BitReaderRaw<FRAMESTART_A>
pub fn framestart(&self) -> BitReaderRaw<FRAMESTART_A>
Bit 14 - Write ‘1’ to enable interrupt for event FRAMESTART
sourcepub fn edend(&self) -> BitReaderRaw<EDEND_A>
pub fn edend(&self) -> BitReaderRaw<EDEND_A>
Bit 15 - Write ‘1’ to enable interrupt for event EDEND
sourcepub fn edstopped(&self) -> BitReaderRaw<EDSTOPPED_A>
pub fn edstopped(&self) -> BitReaderRaw<EDSTOPPED_A>
Bit 16 - Write ‘1’ to enable interrupt for event EDSTOPPED
sourcepub fn ccaidle(&self) -> BitReaderRaw<CCAIDLE_A>
pub fn ccaidle(&self) -> BitReaderRaw<CCAIDLE_A>
Bit 17 - Write ‘1’ to enable interrupt for event CCAIDLE
sourcepub fn ccabusy(&self) -> BitReaderRaw<CCABUSY_A>
pub fn ccabusy(&self) -> BitReaderRaw<CCABUSY_A>
Bit 18 - Write ‘1’ to enable interrupt for event CCABUSY
sourcepub fn ccastopped(&self) -> BitReaderRaw<CCASTOPPED_A>
pub fn ccastopped(&self) -> BitReaderRaw<CCASTOPPED_A>
Bit 19 - Write ‘1’ to enable interrupt for event CCASTOPPED
sourcepub fn rateboost(&self) -> BitReaderRaw<RATEBOOST_A>
pub fn rateboost(&self) -> BitReaderRaw<RATEBOOST_A>
Bit 20 - Write ‘1’ to enable interrupt for event RATEBOOST
sourcepub fn txready(&self) -> BitReaderRaw<TXREADY_A>
pub fn txready(&self) -> BitReaderRaw<TXREADY_A>
Bit 21 - Write ‘1’ to enable interrupt for event TXREADY
sourcepub fn rxready(&self) -> BitReaderRaw<RXREADY_A>
pub fn rxready(&self) -> BitReaderRaw<RXREADY_A>
Bit 22 - Write ‘1’ to enable interrupt for event RXREADY
sourcepub fn mhrmatch(&self) -> BitReaderRaw<MHRMATCH_A>
pub fn mhrmatch(&self) -> BitReaderRaw<MHRMATCH_A>
Bit 23 - Write ‘1’ to enable interrupt for event MHRMATCH
sourcepub fn phyend(&self) -> BitReaderRaw<PHYEND_A>
pub fn phyend(&self) -> BitReaderRaw<PHYEND_A>
Bit 27 - Write ‘1’ to enable interrupt for event PHYEND
sourcepub fn ctepresent(&self) -> BitReaderRaw<CTEPRESENT_A>
pub fn ctepresent(&self) -> BitReaderRaw<CTEPRESENT_A>
Bit 28 - Write ‘1’ to enable interrupt for event CTEPRESENT
Methods from Deref<Target = R<INTENSET_SPEC>>§
sourcepub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.