Struct nrf52::egu0::intenset::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
fn bits(&self) -> u32[src]
Value of the register as raw bits
fn triggered0(&self) -> TRIGGERED0R[src]
Bit 0 - Write '1' to Enable interrupt for TRIGGERED[0] event
fn triggered1(&self) -> TRIGGERED1R[src]
Bit 1 - Write '1' to Enable interrupt for TRIGGERED[1] event
fn triggered2(&self) -> TRIGGERED2R[src]
Bit 2 - Write '1' to Enable interrupt for TRIGGERED[2] event
fn triggered3(&self) -> TRIGGERED3R[src]
Bit 3 - Write '1' to Enable interrupt for TRIGGERED[3] event
fn triggered4(&self) -> TRIGGERED4R[src]
Bit 4 - Write '1' to Enable interrupt for TRIGGERED[4] event
fn triggered5(&self) -> TRIGGERED5R[src]
Bit 5 - Write '1' to Enable interrupt for TRIGGERED[5] event
fn triggered6(&self) -> TRIGGERED6R[src]
Bit 6 - Write '1' to Enable interrupt for TRIGGERED[6] event
fn triggered7(&self) -> TRIGGERED7R[src]
Bit 7 - Write '1' to Enable interrupt for TRIGGERED[7] event
fn triggered8(&self) -> TRIGGERED8R[src]
Bit 8 - Write '1' to Enable interrupt for TRIGGERED[8] event
fn triggered9(&self) -> TRIGGERED9R[src]
Bit 9 - Write '1' to Enable interrupt for TRIGGERED[9] event
fn triggered10(&self) -> TRIGGERED10R[src]
Bit 10 - Write '1' to Enable interrupt for TRIGGERED[10] event
fn triggered11(&self) -> TRIGGERED11R[src]
Bit 11 - Write '1' to Enable interrupt for TRIGGERED[11] event
fn triggered12(&self) -> TRIGGERED12R[src]
Bit 12 - Write '1' to Enable interrupt for TRIGGERED[12] event
fn triggered13(&self) -> TRIGGERED13R[src]
Bit 13 - Write '1' to Enable interrupt for TRIGGERED[13] event
fn triggered14(&self) -> TRIGGERED14R[src]
Bit 14 - Write '1' to Enable interrupt for TRIGGERED[14] event
fn triggered15(&self) -> TRIGGERED15R[src]
Bit 15 - Write '1' to Enable interrupt for TRIGGERED[15] event