#[repr(u8)]
pub enum perf_hw_cache_id_t { PERF_COUNT_HW_CACHE_L1D = 0, PERF_COUNT_HW_CACHE_L1I = 1, PERF_COUNT_HW_CACHE_LL = 2, PERF_COUNT_HW_CACHE_DTLB = 3, PERF_COUNT_HW_CACHE_ITLB = 4, PERF_COUNT_HW_CACHE_BPU = 5, PERF_COUNT_HW_CACHE_NODE = 6, PERF_COUNT_HW_CACHE_MAX = 7, }
Expand description

Generalized hardware cache events:

{ L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x { read, write, prefetch } x { accesses, misses }

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PERF_COUNT_HW_CACHE_L1D = 0

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PERF_COUNT_HW_CACHE_L1I = 1

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PERF_COUNT_HW_CACHE_LL = 2

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PERF_COUNT_HW_CACHE_DTLB = 3

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PERF_COUNT_HW_CACHE_ITLB = 4

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PERF_COUNT_HW_CACHE_BPU = 5

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PERF_COUNT_HW_CACHE_NODE = 6

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PERF_COUNT_HW_CACHE_MAX = 7

non-ABI

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