Expand description

Interrupt 0 Source Channel Flag Register

Structs

Interrupt 0 Source Channel Flag Register

Register DMA_INT0_SRCFLG reader

Type Definitions

Field CH0 reader - Channel 0 was the source of DMA_INT0

Field CH1 reader - Channel 1 was the source of DMA_INT0

Field CH2 reader - Channel 2 was the source of DMA_INT0

Field CH3 reader - Channel 3 was the source of DMA_INT0

Field CH4 reader - Channel 4 was the source of DMA_INT0

Field CH5 reader - Channel 5 was the source of DMA_INT0

Field CH6 reader - Channel 6 was the source of DMA_INT0

Field CH7 reader - Channel 7 was the source of DMA_INT0

Field CH8 reader - Channel 8 was the source of DMA_INT0

Field CH9 reader - Channel 9 was the source of DMA_INT0

Field CH10 reader - Channel 10 was the source of DMA_INT0

Field CH11 reader - Channel 11 was the source of DMA_INT0

Field CH12 reader - Channel 12 was the source of DMA_INT0

Field CH13 reader - Channel 13 was the source of DMA_INT0

Field CH14 reader - Channel 14 was the source of DMA_INT0

Field CH15 reader - Channel 15 was the source of DMA_INT0

Field CH16 reader - Channel 16 was the source of DMA_INT0

Field CH17 reader - Channel 17 was the source of DMA_INT0

Field CH18 reader - Channel 18 was the source of DMA_INT0

Field CH19 reader - Channel 19 was the source of DMA_INT0

Field CH20 reader - Channel 20 was the source of DMA_INT0

Field CH21 reader - Channel 21 was the source of DMA_INT0

Field CH22 reader - Channel 22 was the source of DMA_INT0

Field CH23 reader - Channel 23 was the source of DMA_INT0

Field CH24 reader - Channel 24 was the source of DMA_INT0

Field CH25 reader - Channel 25 was the source of DMA_INT0

Field CH26 reader - Channel 26 was the source of DMA_INT0

Field CH27 reader - Channel 27 was the source of DMA_INT0

Field CH28 reader - Channel 28 was the source of DMA_INT0

Field CH29 reader - Channel 29 was the source of DMA_INT0

Field CH30 reader - Channel 30 was the source of DMA_INT0

Field CH31 reader - Channel 31 was the source of DMA_INT0