Struct msp432p401r::system_control_space::actlr::R

pub struct R(_);

Register ACTLR reader

Implementations

impl R

pub fn dismcycint(&self) -> DISMCYCINT_R

Bit 0 - Disables interruption of multi-cycle instructions. This increases the interrupt latency of the processor becuase LDM/STM completes before interrupt stacking occurs.

pub fn disdefwbuf(&self) -> DISDEFWBUF_R

Bit 1 - Disables write buffer us during default memorty map accesses. This causes all bus faults to be precise bus faults but decreases the performance of the processor because the stores to memory have to complete before the next instruction can be executed.

pub fn disfold(&self) -> DISFOLD_R

Bit 2 - Disables IT folding.

pub fn disfpca(&self) -> DISFPCA_R

Bit 8 - Disable automatic update of CONTROL.FPCA

pub fn disoofp(&self) -> DISOOFP_R

Bit 9 - Disables floating point instructions completing out of order with respect to integer instructions.

Methods from Deref<Target = R<ACTLR_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<ACTLR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<ACTLR_SPEC>> for R

fn from(reader: R<ACTLR_SPEC>) -> Self

Performs the conversion.