Struct msp432p401r::rtc_c::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub rtcctl0: Reg<RTCCTL0_SPEC>,
    pub rtcctl13: Reg<RTCCTL13_SPEC>,
    pub rtcocal: Reg<RTCOCAL_SPEC>,
    pub rtctcmp: Reg<RTCTCMP_SPEC>,
    pub rtcps0ctl: Reg<RTCPS0CTL_SPEC>,
    pub rtcps1ctl: Reg<RTCPS1CTL_SPEC>,
    pub rtcps: Reg<RTCPS_SPEC>,
    pub rtciv: Reg<RTCIV_SPEC>,
    pub rtctim0: Reg<RTCTIM0_SPEC>,
    pub rtctim1: Reg<RTCTIM1_SPEC>,
    pub rtcdate: Reg<RTCDATE_SPEC>,
    pub rtcyear: Reg<RTCYEAR_SPEC>,
    pub rtcaminhr: Reg<RTCAMINHR_SPEC>,
    pub rtcadowday: Reg<RTCADOWDAY_SPEC>,
    pub rtcbin2bcd: Reg<RTCBIN2BCD_SPEC>,
    pub rtcbcd2bin: Reg<RTCBCD2BIN_SPEC>,
}

Register block

Fields

rtcctl0: Reg<RTCCTL0_SPEC>

0x00 - RTCCTL0 Register

rtcctl13: Reg<RTCCTL13_SPEC>

0x02 - RTCCTL13 Register

rtcocal: Reg<RTCOCAL_SPEC>

0x04 - RTCOCAL Register

rtctcmp: Reg<RTCTCMP_SPEC>

0x06 - RTCTCMP Register

rtcps0ctl: Reg<RTCPS0CTL_SPEC>

0x08 - Real-Time Clock Prescale Timer 0 Control Register

rtcps1ctl: Reg<RTCPS1CTL_SPEC>

0x0a - Real-Time Clock Prescale Timer 1 Control Register

rtcps: Reg<RTCPS_SPEC>

0x0c - Real-Time Clock Prescale Timer Counter Register

rtciv: Reg<RTCIV_SPEC>

0x0e - Real-Time Clock Interrupt Vector Register

rtctim0: Reg<RTCTIM0_SPEC>

0x10 - RTCTIM0 Register Hexadecimal Format

rtctim1: Reg<RTCTIM1_SPEC>

0x12 - Real-Time Clock Hour, Day of Week

rtcdate: Reg<RTCDATE_SPEC>

0x14 - RTCDATE - Hexadecimal Format

rtcyear: Reg<RTCYEAR_SPEC>

0x16 - RTCYEAR Register Hexadecimal Format

rtcaminhr: Reg<RTCAMINHR_SPEC>

0x18 - RTCMINHR - Hexadecimal Format

rtcadowday: Reg<RTCADOWDAY_SPEC>

0x1a - RTCADOWDAY - Hexadecimal Format

rtcbin2bcd: Reg<RTCBIN2BCD_SPEC>

0x1c - Binary-to-BCD Conversion Register

rtcbcd2bin: Reg<RTCBCD2BIN_SPEC>

0x1e - BCD-to-Binary Conversion Register

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