Struct msp432p401r::dma::dma_sw_chtrig::W[][src]

pub struct W(_);

Register DMA_SW_CHTRIG writer

Implementations

impl W[src]

pub fn ch0(&mut self) -> CH0_W<'_>[src]

Bit 0 - Write 1, triggers DMA_CHANNEL0

pub fn ch1(&mut self) -> CH1_W<'_>[src]

Bit 1 - Write 1, triggers DMA_CHANNEL1

pub fn ch2(&mut self) -> CH2_W<'_>[src]

Bit 2 - Write 1, triggers DMA_CHANNEL2

pub fn ch3(&mut self) -> CH3_W<'_>[src]

Bit 3 - Write 1, triggers DMA_CHANNEL3

pub fn ch4(&mut self) -> CH4_W<'_>[src]

Bit 4 - Write 1, triggers DMA_CHANNEL4

pub fn ch5(&mut self) -> CH5_W<'_>[src]

Bit 5 - Write 1, triggers DMA_CHANNEL5

pub fn ch6(&mut self) -> CH6_W<'_>[src]

Bit 6 - Write 1, triggers DMA_CHANNEL6

pub fn ch7(&mut self) -> CH7_W<'_>[src]

Bit 7 - Write 1, triggers DMA_CHANNEL7

pub fn ch8(&mut self) -> CH8_W<'_>[src]

Bit 8 - Write 1, triggers DMA_CHANNEL8

pub fn ch9(&mut self) -> CH9_W<'_>[src]

Bit 9 - Write 1, triggers DMA_CHANNEL9

pub fn ch10(&mut self) -> CH10_W<'_>[src]

Bit 10 - Write 1, triggers DMA_CHANNEL10

pub fn ch11(&mut self) -> CH11_W<'_>[src]

Bit 11 - Write 1, triggers DMA_CHANNEL11

pub fn ch12(&mut self) -> CH12_W<'_>[src]

Bit 12 - Write 1, triggers DMA_CHANNEL12

pub fn ch13(&mut self) -> CH13_W<'_>[src]

Bit 13 - Write 1, triggers DMA_CHANNEL13

pub fn ch14(&mut self) -> CH14_W<'_>[src]

Bit 14 - Write 1, triggers DMA_CHANNEL14

pub fn ch15(&mut self) -> CH15_W<'_>[src]

Bit 15 - Write 1, triggers DMA_CHANNEL15

pub fn ch16(&mut self) -> CH16_W<'_>[src]

Bit 16 - Write 1, triggers DMA_CHANNEL16

pub fn ch17(&mut self) -> CH17_W<'_>[src]

Bit 17 - Write 1, triggers DMA_CHANNEL17

pub fn ch18(&mut self) -> CH18_W<'_>[src]

Bit 18 - Write 1, triggers DMA_CHANNEL18

pub fn ch19(&mut self) -> CH19_W<'_>[src]

Bit 19 - Write 1, triggers DMA_CHANNEL19

pub fn ch20(&mut self) -> CH20_W<'_>[src]

Bit 20 - Write 1, triggers DMA_CHANNEL20

pub fn ch21(&mut self) -> CH21_W<'_>[src]

Bit 21 - Write 1, triggers DMA_CHANNEL21

pub fn ch22(&mut self) -> CH22_W<'_>[src]

Bit 22 - Write 1, triggers DMA_CHANNEL22

pub fn ch23(&mut self) -> CH23_W<'_>[src]

Bit 23 - Write 1, triggers DMA_CHANNEL23

pub fn ch24(&mut self) -> CH24_W<'_>[src]

Bit 24 - Write 1, triggers DMA_CHANNEL24

pub fn ch25(&mut self) -> CH25_W<'_>[src]

Bit 25 - Write 1, triggers DMA_CHANNEL25

pub fn ch26(&mut self) -> CH26_W<'_>[src]

Bit 26 - Write 1, triggers DMA_CHANNEL26

pub fn ch27(&mut self) -> CH27_W<'_>[src]

Bit 27 - Write 1, triggers DMA_CHANNEL27

pub fn ch28(&mut self) -> CH28_W<'_>[src]

Bit 28 - Write 1, triggers DMA_CHANNEL28

pub fn ch29(&mut self) -> CH29_W<'_>[src]

Bit 29 - Write 1, triggers DMA_CHANNEL29

pub fn ch30(&mut self) -> CH30_W<'_>[src]

Bit 30 - Write 1, triggers DMA_CHANNEL30

pub fn ch31(&mut self) -> CH31_W<'_>[src]

Bit 31 - Write 1, triggers DMA_CHANNEL31

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]

Writes raw bits to the register.

Methods from Deref<Target = W<DMA_SW_CHTRIG_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self[src]

Writes raw bits to the register.

Trait Implementations

impl Deref for W[src]

type Target = W<DMA_SW_CHTRIG_SPEC>

The resulting type after dereferencing.

impl DerefMut for W[src]

impl From<W<DMA_SW_CHTRIG_SPEC>> for W[src]

Auto Trait Implementations

impl Send for W

impl Sync for W

impl Unpin for W

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.