Trait CapCmpTimer7
msp430fr2x5x_hal::timer
pub trait CapCmpTimer7: TimerPeriph + CapCmp<CCR1> + CapCmp<CCR2> + CapCmp<CCR3> + CapCmp<CCR4> + CapCmp<CCR5> + CapCmp<CCR6> { }
Trait indicating that the peripheral has 7 capture compare registers
impl CapCmpTimer7 for TB3