[][src]Trait msp430fr2x5x_hal::timer::CapCmpTimer7

pub trait CapCmpTimer7: TimerPeriph + CapCmp<CCR1> + CapCmp<CCR2> + CapCmp<CCR3> + CapCmp<CCR4> + CapCmp<CCR5> + CapCmp<CCR6> { }

Trait indicating that the peripheral has 7 capture compare registers

Implementations on Foreign Types

impl CapCmpTimer7 for TB3[src]

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Implementors

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