Expand description

Port 1/2

Modules

Port 1 Direction

Port 1 Drive Strenght

Port 1 Interrupt Enable

Port 1 Interrupt Edge Select

Port 1 Interrupt Flag

Port 1 Input

Port 1 Interrupt Vector Word

Port 1 Output

Port 1 Resistor Enable

Port 1 Selection

Port 2 Direction

Port 2 Drive Strenght

Port 2 Interrupt Enable

Port 2 Interrupt Edge Select

Port 2 Interrupt Flag

Port 2 Input

Port 2 Interrupt Vector Word

Port 2 Output

Port 2 Resistor Enable

Port 2 Selection

Structs

Register block

Type Definitions

P1DIR register accessor: an alias for Reg<P1DIR_SPEC>

P1DS register accessor: an alias for Reg<P1DS_SPEC>

P1IE register accessor: an alias for Reg<P1IE_SPEC>

P1IES register accessor: an alias for Reg<P1IES_SPEC>

P1IFG register accessor: an alias for Reg<P1IFG_SPEC>

P1IN register accessor: an alias for Reg<P1IN_SPEC>

P1IV register accessor: an alias for Reg<P1IV_SPEC>

P1OUT register accessor: an alias for Reg<P1OUT_SPEC>

P1REN register accessor: an alias for Reg<P1REN_SPEC>

P1SEL register accessor: an alias for Reg<P1SEL_SPEC>

P2DIR register accessor: an alias for Reg<P2DIR_SPEC>

P2DS register accessor: an alias for Reg<P2DS_SPEC>

P2IE register accessor: an alias for Reg<P2IE_SPEC>

P2IES register accessor: an alias for Reg<P2IES_SPEC>

P2IFG register accessor: an alias for Reg<P2IFG_SPEC>

P2IN register accessor: an alias for Reg<P2IN_SPEC>

P2IV register accessor: an alias for Reg<P2IV_SPEC>

P2OUT register accessor: an alias for Reg<P2OUT_SPEC>

P2REN register accessor: an alias for Reg<P2REN_SPEC>

P2SEL register accessor: an alias for Reg<P2SEL_SPEC>