Module moore_vhdl::hir
[−]
[src]
The High-level Intermediate Representation of a VHDL design.
Structs
Aggregate |
An aggregate. |
Arch | |
Arenas | |
ArrayConstraint |
An array constraint. |
AssertStmt |
An assertion statement. |
AssocElement |
An association element. |
CallStmt |
A procedure call statement. |
CaseStmt |
A case statement. |
Cond |
A conditional waveform or expression. |
ConstDecl |
A constant declaration. |
Decl |
An object declaration. |
Entity | |
Expr |
An expression. |
FileDecl |
A file declaration. |
IfStmt |
An if statement. |
IntfSignal | |
Lib | |
LoopStmt |
A loop statement. |
NexitStmt |
A next or exit statement. |
NullStmt |
A null statement. |
Package |
A package declaration. |
PackageBody |
A package body. |
PackageInst |
A package instantiation. |
ProcessStmt |
A process statement. |
RecordConstraint |
A record constraint as per IEEE 1076-2008 section 5.3.3. |
ReportStmt |
A report statement. |
ReturnStmt |
A return statement. |
Sel |
A selected waveform or expression. |
SigAssignStmt |
A sequential signal assignment. |
SignalDecl |
A signal declaration. |
Stmt |
A statement. |
Subprog |
A subprogram. |
SubprogBody |
A subprogram body. |
SubprogInst |
A subprogram instantiation. |
SubprogSpec |
A subprogram specification. |
SubtypeDecl |
A subtype declaration as per IEEE 1076-2008 section 6.3. |
SubtypeInd | |
TypeDecl | |
VarAssignStmt |
A variable assignment statement. |
VarDecl |
A variable declaration. |
WaitStmt |
A wait statement. |
WaveElem |
An element of a signal assignment waveform. |
Enums
AggregateKind |
An aggregate kind. |
ArrayChoice |
A choice in an array aggregate. |
ArrayTypeIndex |
An index of an array type. |
AssocActual |
An actual part of an association element. |
BinaryOp |
A binary operator. |
Choice |
A choice in an aggregate. |
Constraint |
A constraint. |
DelayMechanism |
The delay mechanism of a normal signal assignment. |
Dir | |
DiscreteRange |
A discrete range. |
ElementConstraint |
An element constraint. |
EnumLit |
An enumeration literal as listed in a type declaration. |
ExprData |
An expression variant. |
ForceMode |
The mode of a signal force/release statement. |
IntfSignalMode | |
LoopScheme |
A loop scheme. |
NexitMode |
A discriminant for next/exit statements. |
ProcessSensitivity |
A process sensitivity specification. |
Range |
A range. |
SigAssignKind |
A signal assignment kind. |
SigAssignTarget |
A signal assignment target. |
SignalKind |
A signal kind. |
SubprogKind |
A subprogram kind. |
Target |
A target. |
TypeData |
The meat of a type declaration. |
UnaryOp |
A unary operator. |
VarAssignKind |
A variable assignment kind. |
Type Definitions
ArrayChoices |
A list of choices used in array aggregates. |
AssocList |
An association list. |
Choices |
A list of choices used in aggregates, selected assignments, and case statements. |
RecordChoices |
A list of choices used in record aggregates. |
SensitivityList |
A sensitivity list. |
Waveform |
A signal assignment waveform. |