Function moore_vhdl_syntax::parser::rules::parse_paren_expr
source · [−]pub fn parse_paren_expr<P: Parser>(p: &mut P) -> ReportedResult<ParenElems>
Expand description
Try to parse a parenthesized expression. This is a combination of a variety of rules from the VHDL grammar. Most notably, it combines the following:
aggregate
association_list
- suffix of
slice_name
- suffix of
indexed_name
- suffix of
function_call
paren_expr := "(" { [ { expr }"|"+ "=>" ] expr }","+ ")"