Struct mkw41z::dcdc::reg0::W
[−]
[src]
pub struct W { /* fields omitted */ }Value to write to the register
Methods
impl W[src]
pub fn reset_value() -> W[src]
Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]
Writes raw bits to the register
pub fn dcdc_disable_auto_clk_switch(&mut self) -> _DCDC_DISABLE_AUTO_CLK_SWITCHW[src]
Bit 1 - Disable automatic clock switch from internal oscillator to external clock.
pub fn dcdc_sel_clk(&mut self) -> _DCDC_SEL_CLKW[src]
Bit 2 - Select external clock for DCDC when DCDC_DISABLE_AUTO_CLK_SWITCH is set.
pub fn dcdc_pwd_osc_int(&mut self) -> _DCDC_PWD_OSC_INTW[src]
Bit 3 - Power down internal oscillator. Only set this bit when 32M crystal oscillator is available.
pub fn dcdc_lp_df_cmp_enable(&mut self) -> _DCDC_LP_DF_CMP_ENABLEW[src]
Bit 9 - Enable low power differential comparators, to sense lower supply in pulsed mode
pub fn dcdc_vbat_div_ctrl(&mut self) -> _DCDC_VBAT_DIV_CTRLW[src]
Bits 10:11 - Controls VBAT voltage divider
pub fn dcdc_lp_state_hys_l(&mut self) -> _DCDC_LP_STATE_HYS_LW[src]
Bits 17:18 - Configure the hysteretic lower threshold value in low power mode
pub fn dcdc_lp_state_hys_h(&mut self) -> _DCDC_LP_STATE_HYS_HW[src]
Bits 19:20 - Configure the hysteretic upper threshold value in low power mode
pub fn hyst_lp_comp_adj(&mut self) -> _HYST_LP_COMP_ADJW[src]
Bit 21 - Adjust hysteretic value in low power comparator.
pub fn hyst_lp_cmp_disable(&mut self) -> _HYST_LP_CMP_DISABLEW[src]
Bit 22 - Disable hysteresis in low power comparator.
pub fn offset_rsns_lp_adj(&mut self) -> _OFFSET_RSNS_LP_ADJW[src]
Bit 23 - Adjust hysteretic value in low power voltage sense.
pub fn offset_rsns_lp_disable(&mut self) -> _OFFSET_RSNS_LP_DISABLEW[src]
Bit 24 - Disable hysteresis in low power voltage sense.
pub fn dcdc_less_i(&mut self) -> _DCDC_LESS_IW[src]
Bit 25 - Reduce DCDC current. It will save approximately 20 uA in RUN.
pub fn pwd_cmp_offset(&mut self) -> _PWD_CMP_OFFSETW[src]
Bit 26 - Power down output range comparator
pub fn dcdc_xtalok_disable(&mut self) -> _DCDC_XTALOK_DISABLEW[src]
Bit 27 - Disable xtalok detection circuit.
pub fn vlps_config_dcdc_hp(&mut self) -> _VLPS_CONFIG_DCDC_HPW[src]
Bit 29 - Selects behavior of DCDC in device VLPS low power mode
pub fn vlpr_vlpw_config_dcdc_hp(&mut self) -> _VLPR_VLPW_CONFIG_DCDC_HPW[src]
Bit 30 - Selects behavior of DCDC in device VLPR and VLPW low power modes