Struct mkw41z::xcvr_rx_dig::RegisterBlock [−] [src]

#[repr(C)]

pub struct RegisterBlock {
    pub rx_dig_ctrl: RX_DIG_CTRL,
    pub agc_ctrl_0: AGC_CTRL_0,
    pub agc_ctrl_1: AGC_CTRL_1,
    pub agc_ctrl_2: AGC_CTRL_2,
    pub agc_ctrl_3: AGC_CTRL_3,
    pub agc_stat: AGC_STAT,
    pub rssi_ctrl_0: RSSI_CTRL_0,
    pub rssi_ctrl_1: RSSI_CTRL_1,
    pub rssi_dft: RSSI_DFT,
    pub dcoc_ctrl_0: DCOC_CTRL_0,
    pub dcoc_ctrl_1: DCOC_CTRL_1,
    pub dcoc_dac_init: DCOC_DAC_INIT,
    pub dcoc_dig_man: DCOC_DIG_MAN,
    pub dcoc_cal_gain: DCOC_CAL_GAIN,
    pub dcoc_stat: DCOC_STAT,
    pub dcoc_dc_est: DCOC_DC_EST,
    pub dcoc_cal_rcp: DCOC_CAL_RCP,
    pub iqmc_ctrl: IQMC_CTRL,
    pub iqmc_cal: IQMC_CAL,
    pub lna_gain_val_3_0: LNA_GAIN_VAL_3_0,
    pub lna_gain_val_7_4: LNA_GAIN_VAL_7_4,
    pub lna_gain_val_8: LNA_GAIN_VAL_8,
    pub bba_res_tune_val_7_0: BBA_RES_TUNE_VAL_7_0,
    pub bba_res_tune_val_10_8: BBA_RES_TUNE_VAL_10_8,
    pub lna_gain_lin_val_2_0: LNA_GAIN_LIN_VAL_2_0,
    pub lna_gain_lin_val_5_3: LNA_GAIN_LIN_VAL_5_3,
    pub lna_gain_lin_val_8_6: LNA_GAIN_LIN_VAL_8_6,
    pub lna_gain_lin_val_9: LNA_GAIN_LIN_VAL_9,
    pub bba_res_tune_lin_val_3_0: BBA_RES_TUNE_LIN_VAL_3_0,
    pub bba_res_tune_lin_val_7_4: BBA_RES_TUNE_LIN_VAL_7_4,
    pub bba_res_tune_lin_val_10_8: BBA_RES_TUNE_LIN_VAL_10_8,
    pub agc_gain_tbl_03_00: AGC_GAIN_TBL_03_00,
    pub agc_gain_tbl_07_04: AGC_GAIN_TBL_07_04,
    pub agc_gain_tbl_11_08: AGC_GAIN_TBL_11_08,
    pub agc_gain_tbl_15_12: AGC_GAIN_TBL_15_12,
    pub agc_gain_tbl_19_16: AGC_GAIN_TBL_19_16,
    pub agc_gain_tbl_23_20: AGC_GAIN_TBL_23_20,
    pub agc_gain_tbl_26_24: AGC_GAIN_TBL_26_24,
    pub dcoc_offset_0: DCOC_OFFSET_0,
    pub dcoc_offset_1: DCOC_OFFSET_1,
    pub dcoc_offset_2: DCOC_OFFSET_2,
    pub dcoc_offset_3: DCOC_OFFSET_3,
    pub dcoc_offset_4: DCOC_OFFSET_4,
    pub dcoc_offset_5: DCOC_OFFSET_5,
    pub dcoc_offset_6: DCOC_OFFSET_6,
    pub dcoc_offset_7: DCOC_OFFSET_7,
    pub dcoc_offset_8: DCOC_OFFSET_8,
    pub dcoc_offset_9: DCOC_OFFSET_9,
    pub dcoc_offset_10: DCOC_OFFSET_10,
    pub dcoc_offset_11: DCOC_OFFSET_11,
    pub dcoc_offset_12: DCOC_OFFSET_12,
    pub dcoc_offset_13: DCOC_OFFSET_13,
    pub dcoc_offset_14: DCOC_OFFSET_14,
    pub dcoc_offset_15: DCOC_OFFSET_15,
    pub dcoc_offset_16: DCOC_OFFSET_16,
    pub dcoc_offset_17: DCOC_OFFSET_17,
    pub dcoc_offset_18: DCOC_OFFSET_18,
    pub dcoc_offset_19: DCOC_OFFSET_19,
    pub dcoc_offset_20: DCOC_OFFSET_20,
    pub dcoc_offset_21: DCOC_OFFSET_21,
    pub dcoc_offset_22: DCOC_OFFSET_22,
    pub dcoc_offset_23: DCOC_OFFSET_23,
    pub dcoc_offset_24: DCOC_OFFSET_24,
    pub dcoc_offset_25: DCOC_OFFSET_25,
    pub dcoc_offset_26: DCOC_OFFSET_26,
    pub dcoc_bba_step: DCOC_BBA_STEP,
    pub dcoc_tza_step_0: DCOC_TZA_STEP_0,
    pub dcoc_tza_step_1: DCOC_TZA_STEP_1,
    pub dcoc_tza_step_2: DCOC_TZA_STEP_2,
    pub dcoc_tza_step_3: DCOC_TZA_STEP_3,
    pub dcoc_tza_step_4: DCOC_TZA_STEP_4,
    pub dcoc_tza_step_5: DCOC_TZA_STEP_5,
    pub dcoc_tza_step_6: DCOC_TZA_STEP_6,
    pub dcoc_tza_step_7: DCOC_TZA_STEP_7,
    pub dcoc_tza_step_8: DCOC_TZA_STEP_8,
    pub dcoc_tza_step_9: DCOC_TZA_STEP_9,
    pub dcoc_tza_step_10: DCOC_TZA_STEP_10,
    pub dcoc_cal_alpha: DCOC_CAL_ALPHA,
    pub dcoc_cal_beta_q: DCOC_CAL_BETA_Q,
    pub dcoc_cal_beta_i: DCOC_CAL_BETA_I,
    pub dcoc_cal_gamma: DCOC_CAL_GAMMA,
    pub dcoc_cal_iir: DCOC_CAL_IIR,
    pub dcoc_cal1: DCOC_CAL1,
    pub dcoc_cal2: DCOC_CAL2,
    pub dcoc_cal3: DCOC_CAL3,
    pub cca_ed_lqi_ctrl_0: CCA_ED_LQI_CTRL_0,
    pub cca_ed_lqi_ctrl_1: CCA_ED_LQI_CTRL_1,
    pub cca_ed_lqi_stat_0: CCA_ED_LQI_STAT_0,
    pub rx_chf_coef_0: RX_CHF_COEF_0,
    pub rx_chf_coef_1: RX_CHF_COEF_1,
    pub rx_chf_coef_2: RX_CHF_COEF_2,
    pub rx_chf_coef_3: RX_CHF_COEF_3,
    pub rx_chf_coef_4: RX_CHF_COEF_4,
    pub rx_chf_coef_5: RX_CHF_COEF_5,
    pub rx_chf_coef_6: RX_CHF_COEF_6,
    pub rx_chf_coef_7: RX_CHF_COEF_7,
    pub rx_chf_coef_8: RX_CHF_COEF_8,
    pub rx_chf_coef_9: RX_CHF_COEF_9,
    pub rx_chf_coef_10: RX_CHF_COEF_10,
    pub rx_chf_coef_11: RX_CHF_COEF_11,
    pub agc_man_agc_idx: AGC_MAN_AGC_IDX,
    pub dc_resid_ctrl: DC_RESID_CTRL,
    pub dc_resid_est: DC_RESID_EST,
    pub rx_rccal_ctrl0: RX_RCCAL_CTRL0,
    pub rx_rccal_ctrl1: RX_RCCAL_CTRL1,
    pub rx_rccal_stat: RX_RCCAL_STAT,
    pub auxpll_fcal_ctrl: AUXPLL_FCAL_CTRL,
    pub auxpll_fcal_cnt6: AUXPLL_FCAL_CNT6,
    pub auxpll_fcal_cnt5_4: AUXPLL_FCAL_CNT5_4,
    pub auxpll_fcal_cnt3_2: AUXPLL_FCAL_CNT3_2,
    pub auxpll_fcal_cnt1_0: AUXPLL_FCAL_CNT1_0,
    pub rxdig_dft: RXDIG_DFT,
    // some fields omitted
}

Register block

Fields

0x00 - RX Digital Control

0x04 - AGC Control 0

0x08 - AGC Control 1

0x0c - AGC Control 2

0x10 - AGC Control 3

0x14 - AGC Status

0x18 - RSSI Control 0

0x1c - RSSI Control 1

0x20 - RSSI DFT

0x24 - DCOC Control 0

0x28 - DCOC Control 1

0x2c - DCOC DAC Initialization

0x30 - DCOC Digital Correction Manual Override

0x34 - DCOC Calibration Gain

0x38 - DCOC Status

0x3c - DCOC DC Estimate

0x40 - DCOC Calibration Reciprocals

0x48 - IQMC Control

0x4c - IQMC Calibration

0x50 - LNA_GAIN Step Values 3..0

0x54 - LNA_GAIN Step Values 7..4

0x58 - LNA_GAIN Step Values 8

0x5c - BBA Resistor Tune Values 7..0

0x60 - BBA Resistor Tune Values 10..8

0x64 - LNA Linear Gain Values 2..0

0x68 - LNA Linear Gain Values 5..3

0x6c - LNA Linear Gain Values 8..6

0x70 - LNA Linear Gain Values 9

0x74 - BBA Resistor Tune Values 3..0

0x78 - BBA Resistor Tune Values 7..4

0x7c - BBA Resistor Tune Values 10..8

0x80 - AGC Gain Tables Step 03..00

0x84 - AGC Gain Tables Step 07..04

0x88 - AGC Gain Tables Step 11..08

0x8c - AGC Gain Tables Step 15..12

0x90 - AGC Gain Tables Step 19..16

0x94 - AGC Gain Tables Step 23..20

0x98 - AGC Gain Tables Step 26..24

0xa0 - DCOC Offset

0xa4 - DCOC Offset

0xa8 - DCOC Offset

0xac - DCOC Offset

0xb0 - DCOC Offset

0xb4 - DCOC Offset

0xb8 - DCOC Offset

0xbc - DCOC Offset

0xc0 - DCOC Offset

0xc4 - DCOC Offset

0xc8 - DCOC Offset

0xcc - DCOC Offset

0xd0 - DCOC Offset

0xd4 - DCOC Offset

0xd8 - DCOC Offset

0xdc - DCOC Offset

0xe0 - DCOC Offset

0xe4 - DCOC Offset

0xe8 - DCOC Offset

0xec - DCOC Offset

0xf0 - DCOC Offset

0xf4 - DCOC Offset

0xf8 - DCOC Offset

0xfc - DCOC Offset

0x100 - DCOC Offset

0x104 - DCOC Offset

0x108 - DCOC Offset

0x10c - DCOC BBA DAC Step

0x110 - DCOC TZA DAC Step 0

0x114 - DCOC TZA DAC Step 1

0x118 - DCOC TZA DAC Step 2

0x11c - DCOC TZA DAC Step 3

0x120 - DCOC TZA DAC Step 4

0x124 - DCOC TZA DAC Step 5

0x128 - DCOC TZA DAC Step 6

0x12c - DCOC TZA DAC Step 7

0x130 - DCOC TZA DAC Step 5

0x134 - DCOC TZA DAC Step 9

0x138 - DCOC TZA DAC Step 10

0x168 - DCOC Calibration Alpha

0x16c - DCOC Calibration Beta Q

0x170 - DCOC Calibration Beta I

0x174 - DCOC Calibration Gamma

0x178 - DCOC Calibration IIR

0x180 - DCOC Calibration Result

0x184 - DCOC Calibration Result

0x188 - DCOC Calibration Result

0x190 - RX_DIG CCA ED LQI Control Register 0

0x194 - RX_DIG CCA ED LQI Control Register 1

0x198 - RX_DIG CCA ED LQI Status Register 0

0x1a0 - Receive Channel Filter Coefficient 0

0x1a4 - Receive Channel Filter Coefficient 1

0x1a8 - Receive Channel Filter Coefficient 2

0x1ac - Receive Channel Filter Coefficient 3

0x1b0 - Receive Channel Filter Coefficient 4

0x1b4 - Receive Channel Filter Coefficient 5

0x1b8 - Receive Channel Filter Coefficient 6

0x1bc - Receive Channel Filter Coefficient 7

0x1c0 - Receive Channel Filter Coefficient 8

0x1c4 - Receive Channel Filter Coefficient 9

0x1c8 - Receive Channel Filter Coefficient 10

0x1cc - Receive Channel Filter Coefficient 11

0x1d0 - AGC Manual AGC Index

0x1d4 - DC Residual Control

0x1d8 - DC Residual Estimate

0x1dc - RX RC Calibration Control0

0x1e0 - RX RC Calibration Control1

0x1e4 - RX RC Calibration Status

0x1e8 - Aux PLL Frequency Calibration Control

0x1ec - Aux PLL Frequency Calibration Count 6

0x1f0 - Aux PLL Frequency Calibration Count 5 and 4

0x1f4 - Aux PLL Frequency Calibration Count 3 and 2

0x1f8 - Aux PLL Frequency Calibration Count 1 and 0

0x1fc - RXDIG DFT

Trait Implementations

Auto Trait Implementations

impl Send for RegisterBlock

impl !Sync for RegisterBlock