Enum mkl25z4::i2c1::c1::DMAEN_A

pub enum DMAEN_A {
    _0,
    _1,
}

DMA Enable

Value on reset: 0

Variants

_0

0: All DMA signalling disabled.

_1

1: DMA transfer is enabled and the following conditions trigger the DMA request: While FACK = 0, a data byte is received, either address or data is transmitted. (ACK/NACK automatic) While FACK = 0, the first byte received matches the A1 register or is general call address. If any address matching occurs, IAAS and TCF are set. If the direction of transfer is known from master to slave, then it is not required to check the SRW. With this assumption, DMA can also be used in this case. In other cases, if the master reads data from the slave, then it is required to rewrite the C1 register operation. With this assumption, DMA cannot be used. When FACK = 1, an address or a data byte is transmitted.

Trait Implementations

impl Clone for DMAEN_A

fn clone(&self) -> DMAEN_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for DMAEN_A

impl Debug for DMAEN_A

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.

impl From<DMAEN_A> for bool

fn from(variant: DMAEN_A) -> Self

Performs the conversion.

impl PartialEq<DMAEN_A> for DMAEN_A

fn eq(&self, other: &DMAEN_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use] fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl StructuralPartialEq for DMAEN_A