Type Definition mk66f18::sim::CLKDIV1

type CLKDIV1 = Reg<u32, _CLKDIV1>;

System Clock Divider Register 1

This register you can read, reset, write, write_with_zero, modify. See API.

For information about avaliable fields see clkdiv1 module

Trait Implementations

impl Readable for CLKDIV1

read() method returns clkdiv1::R reader structure

impl Writable for CLKDIV1

write(|w| ..) method takes clkdiv1::W writer structure

impl ResetValue for CLKDIV1

Register CLKDIV1 reset()'s with value 0x0011_0000

type Type = u32

Register size

fn reset_value() -> Self::Type

Reset value of the register