pub enum DMAENR {
_0,
_1,
}
Expand description
Possible values of the field DMAEN
Variants§
_0
All DMA signalling disabled.
_1
DMA transfer is enabled and the following conditions trigger the DMA request: While FACK = 0, a data byte is received, either address or data is transmitted. (ACK/NACK automatic) While FACK = 0, the first byte received matches the A1 register or is general call address. If any address matching occurs, IAAS and TCF are set. If the direction of transfer is known from master to slave, then it is not required to check the SRW. With this assumption, DMA can also be used in this case. In other cases, if the master reads data from the slave, then it is required to rewrite the C1 register operation. With this assumption, DMA cannot be used. When FACK = 1, an address or a data byte is transmitted.
Implementations§
source§impl DMAENR
impl DMAENR
sourcepub fn bit_is_clear(&self) -> bool
pub fn bit_is_clear(&self) -> bool
Returns true
if the bit is clear (0)
sourcepub fn bit_is_set(&self) -> bool
pub fn bit_is_set(&self) -> bool
Returns true
if the bit is set (1)