Expand description
Peripheral access API for MIMXRT685S_CM33 microcontrollers (generated using svd2rust v0.35.0 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Re-exports§
pub use self::wwdt0 as wwdt1;pub use self::ctimer0 as ctimer1;pub use self::ctimer0 as ctimer2;pub use self::ctimer0 as ctimer3;pub use self::ctimer0 as ctimer4;pub use self::gpio as secgpio;pub use self::dma0 as dma1;pub use self::flexcomm0 as flexcomm1;pub use self::flexcomm0 as flexcomm2;pub use self::flexcomm0 as flexcomm3;pub use self::flexcomm0 as flexcomm4;pub use self::flexcomm0 as flexcomm5;pub use self::flexcomm0 as flexcomm6;pub use self::flexcomm0 as flexcomm7;pub use self::flexcomm0 as flexcomm14;pub use self::flexcomm0 as flexcomm15;pub use self::i2c0 as i2c1;pub use self::i2c0 as i2c2;pub use self::i2c0 as i2c3;pub use self::i2c0 as i2c4;pub use self::i2c0 as i2c5;pub use self::i2c0 as i2c6;pub use self::i2c0 as i2c7;pub use self::i2c0 as i2c15;pub use self::i2s0 as i2s1;pub use self::i2s0 as i2s2;pub use self::i2s0 as i2s3;pub use self::i2s0 as i2s4;pub use self::i2s0 as i2s5;pub use self::i2s0 as i2s6;pub use self::i2s0 as i2s7;pub use self::spi0 as spi1;pub use self::spi0 as spi2;pub use self::spi0 as spi3;pub use self::spi0 as spi4;pub use self::spi0 as spi5;pub use self::spi0 as spi6;pub use self::spi0 as spi7;pub use self::spi0 as spi14;pub use self::usart0 as usart1;pub use self::usart0 as usart2;pub use self::usart0 as usart3;pub use self::usart0 as usart4;pub use self::usart0 as usart5;pub use self::usart0 as usart6;pub use self::usart0 as usart7;pub use self::usdhc0 as usdhc1;
Modules§
- adc0
- ADC
- ahb_
secure_ ctrl - LPC_Next0 AHB secure controller
- cache64
- CACHE64
- cache64_
polsel - CACHE64_POLSEL
- casper
- LPC-Next0 CASPER
- clkctl0
- clock ccontroller 0
- clkctl1
- clock ccontroller 1
- cmp
- CMP
- crc_
engine - LPC_Next0 CRC engine
- ctimer0
- LPC-Next0 Standard async counter/timer
- dma0
- LPC-Next0 DMA controller
- dmic0
- LPC_Next0 DMIC Subsystem (DMIC))
- flexcomm0
- LPC-Next0 Flexcomm serial communication
- flexspi
- FlexSPI
- freqme
- LPC_Next0 Frequency Measurement (FREQME)
- generic
- Common register and bit access and modify traits
- gpio
- LPC-Next0 General Purpose I/O (GPIO)
- hashcrypt
- LPC-Next0 Hash-Crypt peripheral
- i2c0
- LPC-Next0 I2C-bus interfaces
- i2s0
- LPC-Next0 I2S interface
- i3c
- I3C
- inputmux
- LPC_Next0 Peripheral Input Multiplexers Controller
- iopctl
- LPC-Next0 IO pad controller
- mrt0
- LPC-Next0 Multi-Rate Timer (MRT)
- mua
- LPC-Next0 MUA
- ocotp
- LPC-Next0 OTP controller
- ostimer0
- LPC_Next0 Synchronous OS/Event timer with Wakeup Timer
- otfad
- OTFAD
- pint
- LPC-Next0 Pin interrupt and pattern match (PINT)
- pmc
- LPC-Next0 Power Management Controller
- powerquad
- LPC-Next0 Digital Signal Co-Processing companion to a Cortex-M v8M CPU core
- puf
- PUF Controller
- rstctl0
- reset ccontroller 0
- rstctl1
- reset ccontroller 1
- rtc
- LPC-Next0 Real-Time Clock (RTC)
- sau
- Security Attribution Unit
- scn_scb
- System Control not in System Control Block
- sct0
- LPC84x SCTimer/PWM (SCT)
- sema42
- LPC-Next0 SEMA
- spi0
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- sysctl0
- system controller 0
- sysctl1
- system ccontroller 1
- trng
- LPC-Next0 RNG
- usart0
- LPC_Next0 USARTs
- usbhsd
- LPC54S60x/LPC5460x USB1 High-speed Device Controller
- usbhsdcd
- USBDCD
- usbhsh
- LPC-Next0 USB1 High-speed Host Controller
- usbphy
- Universal System Bus Physical Layer
- usdhc0
- uSDHC
- utick0
- LPC-Next0 Micro-tick Timer (UTICK)
- wwdt0
- LPC_Next0 Windowed Watchdog Timer (WWDT)
Structs§
- Adc0
- ADC
- AhbSecure
Ctrl - LPC_Next0 AHB secure controller
- Cache64
- CACHE64
- Cache64
Polsel - CACHE64_POLSEL
- Casper
- LPC-Next0 CASPER
- Clkctl0
- clock ccontroller 0
- Clkctl1
- clock ccontroller 1
- Cmp
- CMP
- CrcEngine
- LPC_Next0 CRC engine
- Ctimer0
- LPC-Next0 Standard async counter/timer
- Ctimer1
- LPC-Next0 Standard async counter/timer
- Ctimer2
- LPC-Next0 Standard async counter/timer
- Ctimer3
- LPC-Next0 Standard async counter/timer
- Ctimer4
- LPC-Next0 Standard async counter/timer
- Dma0
- LPC-Next0 DMA controller
- Dma1
- LPC-Next0 DMA controller
- Dmic0
- LPC_Next0 DMIC Subsystem (DMIC))
- Flexcomm0
- LPC-Next0 Flexcomm serial communication
- Flexcomm1
- LPC-Next0 Flexcomm serial communication
- Flexcomm2
- LPC-Next0 Flexcomm serial communication
- Flexcomm3
- LPC-Next0 Flexcomm serial communication
- Flexcomm4
- LPC-Next0 Flexcomm serial communication
- Flexcomm5
- LPC-Next0 Flexcomm serial communication
- Flexcomm6
- LPC-Next0 Flexcomm serial communication
- Flexcomm7
- LPC-Next0 Flexcomm serial communication
- Flexcomm14
- LPC-Next0 Flexcomm serial communication
- Flexcomm15
- LPC-Next0 Flexcomm serial communication
- Flexspi
- FlexSPI
- Freqme
- LPC_Next0 Frequency Measurement (FREQME)
- Gpio
- LPC-Next0 General Purpose I/O (GPIO)
- Hashcrypt
- LPC-Next0 Hash-Crypt peripheral
- I2c0
- LPC-Next0 I2C-bus interfaces
- I2c1
- LPC-Next0 I2C-bus interfaces
- I2c2
- LPC-Next0 I2C-bus interfaces
- I2c3
- LPC-Next0 I2C-bus interfaces
- I2c4
- LPC-Next0 I2C-bus interfaces
- I2c5
- LPC-Next0 I2C-bus interfaces
- I2c6
- LPC-Next0 I2C-bus interfaces
- I2c7
- LPC-Next0 I2C-bus interfaces
- I2c15
- LPC-Next0 I2C-bus interfaces
- I2s0
- LPC-Next0 I2S interface
- I2s1
- LPC-Next0 I2S interface
- I2s2
- LPC-Next0 I2S interface
- I2s3
- LPC-Next0 I2S interface
- I2s4
- LPC-Next0 I2S interface
- I2s5
- LPC-Next0 I2S interface
- I2s6
- LPC-Next0 I2S interface
- I2s7
- LPC-Next0 I2S interface
- I3c
- I3C
- Inputmux
- LPC_Next0 Peripheral Input Multiplexers Controller
- Iopctl
- LPC-Next0 IO pad controller
- Mrt0
- LPC-Next0 Multi-Rate Timer (MRT)
- Mua
- LPC-Next0 MUA
- Ocotp
- LPC-Next0 OTP controller
- Ostimer0
- LPC_Next0 Synchronous OS/Event timer with Wakeup Timer
- Otfad
- OTFAD
- Peripherals
- All the peripherals.
- Pint
- LPC-Next0 Pin interrupt and pattern match (PINT)
- Pmc
- LPC-Next0 Power Management Controller
- Powerquad
- LPC-Next0 Digital Signal Co-Processing companion to a Cortex-M v8M CPU core
- Puf
- PUF Controller
- Rstctl0
- reset ccontroller 0
- Rstctl1
- reset ccontroller 1
- Rtc
- LPC-Next0 Real-Time Clock (RTC)
- Sau
- Security Attribution Unit
- ScnScb
- System Control not in System Control Block
- Sct0
- LPC84x SCTimer/PWM (SCT)
- Secgpio
- LPC-Next0 General Purpose I/O (GPIO)
- Sema42
- LPC-Next0 SEMA
- Spi0
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Spi1
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Spi2
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Spi3
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Spi4
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Spi5
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Spi6
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Spi7
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Spi14
- LPC_Next0 Serial Peripheral Interfaces (SPI)
- Sysctl0
- system controller 0
- Sysctl1
- system ccontroller 1
- Trng
- LPC-Next0 RNG
- Usart0
- LPC_Next0 USARTs
- Usart1
- LPC_Next0 USARTs
- Usart2
- LPC_Next0 USARTs
- Usart3
- LPC_Next0 USARTs
- Usart4
- LPC_Next0 USARTs
- Usart5
- LPC_Next0 USARTs
- Usart6
- LPC_Next0 USARTs
- Usart7
- LPC_Next0 USARTs
- Usbhsd
- LPC54S60x/LPC5460x USB1 High-speed Device Controller
- Usbhsdcd
- USBDCD
- Usbhsh
- LPC-Next0 USB1 High-speed Host Controller
- Usbphy
- Universal System Bus Physical Layer
- Usdhc0
- uSDHC
- Usdhc1
- uSDHC
- Utick0
- LPC-Next0 Micro-tick Timer (UTICK)
- Wwdt0
- LPC_Next0 Windowed Watchdog Timer (WWDT)
- Wwdt1
- LPC_Next0 Windowed Watchdog Timer (WWDT)
Enums§
- Interrupt
- Enumeration of all the interrupts.
Constants§
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority