[−][src]Trait memflow::architecture::ScopedVirtualTranslate
Translates virtual memory to physical using internal translation base (usually a process' dtb)
This trait abstracts virtual address translation for a single virtual memory scope.
On x86 architectures, it is a single Address
- a CR3 register. But other architectures may
use multiple translation bases, or use a completely different translation mechanism (MIPS).
Required methods
fn virt_to_phys_iter<T: PhysicalMemory + ?Sized, B: SplitAtIndex, VI: Iterator<Item = (Address, B)>, VO: Extend<(PhysicalAddress, B)>, FO: Extend<(Error, Address, B)>>(
&self,
mem: &mut T,
addrs: VI,
out: &mut VO,
out_fail: &mut FO,
arena: &Bump
)
&self,
mem: &mut T,
addrs: VI,
out: &mut VO,
out_fail: &mut FO,
arena: &Bump
)
fn translation_table_id(&self, address: Address) -> usize
fn arch(&self) -> ArchitectureObj
Provided methods
fn virt_to_phys<T: PhysicalMemory>(
&self,
mem: &mut T,
addr: Address
) -> Result<PhysicalAddress>
&self,
mem: &mut T,
addr: Address
) -> Result<PhysicalAddress>
Implementors
impl ScopedVirtualTranslate for X86ScopedVirtualTranslate
[src]
fn virt_to_phys_iter<T: PhysicalMemory + ?Sized, B: SplitAtIndex, VI: Iterator<Item = (Address, B)>, VO: Extend<(PhysicalAddress, B)>, FO: Extend<(Error, Address, B)>>(
&self,
mem: &mut T,
addrs: VI,
out: &mut VO,
out_fail: &mut FO,
arena: &Bump
)
[src]
&self,
mem: &mut T,
addrs: VI,
out: &mut VO,
out_fail: &mut FO,
arena: &Bump
)