Struct lpc845_pac::usart0::ctl::W[][src]

pub struct W(_);
Expand description

Register CTL writer

Implementations

Bit 1 - Break Enable.

Bit 2 - Enable address detect mode.

Bit 6 - Transmit Disable.

Bit 8 - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode.

Bit 9 - Clear Continuous Clock.

Bit 16 - Autobaud enable.

Writes raw bits to the register.

Methods from Deref<Target = W<CTL_SPEC>>

Writes raw bits to the register.

Trait Implementations

The resulting type after dereferencing.

Dereferences the value.

Mutably dereferences the value.

Performs the conversion.

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Performs the conversion.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.