Struct lpc845_pac::syscon::fclksel::FCLKSEL_SPEC

pub struct FCLKSEL_SPEC;

peripheral clock source select register. FCLK0SEL~FCLK4SEL are for UART0~UART4 clock source select register. FCLK5SEL~FCLK8SEL are for I2C0~I2C3 clock source select register. FCLK9SEL~FCLK10SEL are for SPI0~SPI1 clock source select register.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see fclksel module

Trait Implementations

impl Readable for FCLKSEL_SPEC

read() method returns fclksel::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for FCLKSEL_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for FCLKSEL_SPEC

reset() method sets FCLKSEL[%s] to value 0x07

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for FCLKSEL_SPEC

write(|w| ..) method takes fclksel::W writer structure

type Writer = W

Writer type argument to write, et al.