Struct lpc845_pac::swm0::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 17 fields
pub pinassign0: Reg<PINASSIGN0_SPEC>,
pub pinassign1: Reg<PINASSIGN1_SPEC>,
pub pinassign2: Reg<PINASSIGN2_SPEC>,
pub pinassign3: Reg<PINASSIGN3_SPEC>,
pub pinassign4: Reg<PINASSIGN4_SPEC>,
pub pinassign5: Reg<PINASSIGN5_SPEC>,
pub pinassign6: Reg<PINASSIGN6_SPEC>,
pub pinassign7: Reg<PINASSIGN7_SPEC>,
pub pinassign8: Reg<PINASSIGN8_SPEC>,
pub pinassign9: Reg<PINASSIGN9_SPEC>,
pub pinassign10: Reg<PINASSIGN10_SPEC>,
pub pinassign11: Reg<PINASSIGN11_SPEC>,
pub pinassign12: Reg<PINASSIGN12_SPEC>,
pub pinassign13: Reg<PINASSIGN13_SPEC>,
pub pinassign14: Reg<PINASSIGN14_SPEC>,
pub pinenable0: Reg<PINENABLE0_SPEC>,
pub pinenable1: Reg<PINENABLE1_SPEC>,
// some fields omitted
}Expand description
Register block
Fields
pinassign0: Reg<PINASSIGN0_SPEC>0x00 - Pin assign register 0. Assign movable functions U0_TXD, U0_RXD, U0_RTS, U0_CTS.
pinassign1: Reg<PINASSIGN1_SPEC>0x04 - Pin assign register 1. Assign movable functions U0_SCLK, U1_TXD, U1_RXD, U1_RTS.
pinassign2: Reg<PINASSIGN2_SPEC>0x08 - Pin assign register 2. Assign movable functions U1_CTS, U1_SCLK, U2_TXD, U2_RXD.
pinassign3: Reg<PINASSIGN3_SPEC>0x0c - Pin assign register 3. Assign movable function U2_RTS, U2_CTS, U2_SCLK, SPI0_SCK.
pinassign4: Reg<PINASSIGN4_SPEC>0x10 - Pin assign register 4. Assign movable functions SPI0_MOSI, SPI0_MISO, SPI0_SSEL0, SPI0_SSEL1.
pinassign5: Reg<PINASSIGN5_SPEC>0x14 - Pin assign register 5. Assign movable functions SPI0_SSEL2, SPI0_SSEL3, SPI1_SCK, SPI1_MOSI
pinassign6: Reg<PINASSIGN6_SPEC>0x18 - Pin assign register 6. Assign movable functions SPI1_MISO, SPI1_SSEL0, SPI1_SSEL1, SCT0_IN0.
pinassign7: Reg<PINASSIGN7_SPEC>0x1c - Pin assign register 7. Assign movable functions SCT_IN1, SCT_IN2, SCT_IN3, SCT_OUT0.
pinassign8: Reg<PINASSIGN8_SPEC>0x20 - Pin assign register 8. Assign movable functions SCT_OUT1, SCT_OUT2, SCT_OUT3, SCT_OUT4.
pinassign9: Reg<PINASSIGN9_SPEC>0x24 - Pin assign register 9. Assign movable functions SCT_OUT5, SCT_OUT6, I2C1_SDA, I2C1_SCL.
pinassign10: Reg<PINASSIGN10_SPEC>0x28 - Pin assign register 10. Assign movable functions I2C2_SDA, I2C2_SCL, I2C3_SDA, I2C3_SCL.
pinassign11: Reg<PINASSIGN11_SPEC>0x2c - Pin assign register 11. Assign movable functions COMP0_OUT, CLKOUT, GPIOINT_BMATCH, UART3_TXD
pinassign12: Reg<PINASSIGN12_SPEC>0x30 - Pin assign register 12. Assign movable functions UART3_RXD, UART3_SCLK, UART4_TXD, UART4_RXD.
pinassign13: Reg<PINASSIGN13_SPEC>0x34 - Pin assign register 13. Assign movable functions UART4_SCLK, T0_MAT0, T0_MAT1, T0_MAT2.
pinassign14: Reg<PINASSIGN14_SPEC>0x38 - Pin assign register 14. Assign movable functions T0_MAT3, T0_CAP0, T0_CAP1, T0_CAP2.
pinenable0: Reg<PINENABLE0_SPEC>0x1c0 - Pin enable register 0. Enables fixed-pin functions ACMP_I0, ACMP_I1, SWCLK, SWDIO, XTALIN, XTALOUT, RESET, CLKIN, VDDCMP and so on.
pinenable1: Reg<PINENABLE1_SPEC>0x1c4 - Pin enable register 1. Enables fixed-pin functions CAPT_X4, CAPT_X5, CAPT_X6, CAPT_X7, CAPT_X8, CAPT_X4, CAPT_YL and CAPT_YH.