Struct lpc845_pac::sct0::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 21 fields
pub config: Reg<CONFIG_SPEC>,
pub ctrl: Reg<CTRL_SPEC>,
pub limit: Reg<LIMIT_SPEC>,
pub halt: Reg<HALT_SPEC>,
pub stop: Reg<STOP_SPEC>,
pub start: Reg<START_SPEC>,
pub count: Reg<COUNT_SPEC>,
pub state: Reg<STATE_SPEC>,
pub input: Reg<INPUT_SPEC>,
pub regmode: Reg<REGMODE_SPEC>,
pub output: Reg<OUTPUT_SPEC>,
pub outputdirctrl: Reg<OUTPUTDIRCTRL_SPEC>,
pub res: Reg<RES_SPEC>,
pub dma0request: Reg<DMA0REQUEST_SPEC>,
pub dma1request: Reg<DMA1REQUEST_SPEC>,
pub even: Reg<EVEN_SPEC>,
pub evflag: Reg<EVFLAG_SPEC>,
pub conen: Reg<CONEN_SPEC>,
pub conflag: Reg<CONFLAG_SPEC>,
pub event: [EVENT; 8],
pub out: [OUT; 7],
// some fields omitted
}
Expand description
Register block
Fields
config: Reg<CONFIG_SPEC>
0x00 - SCT configuration register
ctrl: Reg<CTRL_SPEC>
0x04 - SCT control register
limit: Reg<LIMIT_SPEC>
0x08 - SCT limit event select register
halt: Reg<HALT_SPEC>
0x0c - SCT halt event select register
stop: Reg<STOP_SPEC>
0x10 - SCT stop event select register
start: Reg<START_SPEC>
0x14 - SCT start event select register
count: Reg<COUNT_SPEC>
0x40 - SCT counter register
state: Reg<STATE_SPEC>
0x44 - SCT state register
input: Reg<INPUT_SPEC>
0x48 - SCT input register
regmode: Reg<REGMODE_SPEC>
0x4c - SCT match/capture mode register
output: Reg<OUTPUT_SPEC>
0x50 - SCT output register
outputdirctrl: Reg<OUTPUTDIRCTRL_SPEC>
0x54 - SCT output counter direction control register
res: Reg<RES_SPEC>
0x58 - SCT conflict resolution register
dma0request: Reg<DMA0REQUEST_SPEC>
0x5c - SCT DMA request 0 register
dma1request: Reg<DMA1REQUEST_SPEC>
0x60 - SCT DMA request 1 register
even: Reg<EVEN_SPEC>
0xf0 - SCT event interrupt enable register
evflag: Reg<EVFLAG_SPEC>
0xf4 - SCT event flag register
conen: Reg<CONEN_SPEC>
0xf8 - SCT conflict interrupt enable register
conflag: Reg<CONFLAG_SPEC>
0xfc - SCT conflict flag register
event: [EVENT; 8]
0x300..0x340 - no description available
out: [OUT; 7]
0x500..0x538 - no description available
Implementations
0x100..0x120 - SCT match value register of match channels
0x100..0x120 - SCT capture register of capture channel
0x200..0x220 - SCT match reload value register
0x200..0x220 - SCT capture control register