Struct lpc845_pac::dma0::enableclr0::ENABLECLR0_SPEC

pub struct ENABLECLR0_SPEC;

Channel Enable Clear for all DMA channels.

This register you can write_with_zero, reset, write. See API.

For information about available fields see enableclr0 module

Trait Implementations

impl RegisterSpec for ENABLECLR0_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for ENABLECLR0_SPEC

reset() method sets ENABLECLR0 to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for ENABLECLR0_SPEC

write(|w| ..) method takes enableclr0::W writer structure

type Writer = W

Writer type argument to write, et al.