Struct lpc845_pac::dma0::enableclr0::CLR_W

pub struct CLR_W<'a> { /* fields omitted */ }

Field CLR writer - Writing ones to this register clears the corresponding bits in ENABLESET0. Bit n clears the channel enable bit n. The number of bits = number of DMA channels in this device. Other bits are reserved.

Implementations

impl<'a> CLR_W<'a>

pub unsafe fn bits(self, value: u32) -> &'a mut W

Writes raw bits to the field