Struct lpc845_pac::ctimer0::mcr::R

pub struct R(_);

Register MCR reader

Implementations

impl R

pub fn mr0i(&self) -> MR0I_R

Bit 0 - Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC. 0 = disabled. 1 = enabled.

pub fn mr0r(&self) -> MR0R_R

Bit 1 - Reset on MR0: the TC will be reset if MR0 matches it. 0 = disabled. 1 = enabled.

pub fn mr0s(&self) -> MR0S_R

Bit 2 - Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches the TC. 0 = disabled. 1 = enabled.

pub fn mr1i(&self) -> MR1I_R

Bit 3 - Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC. 0 = disabled. 1 = enabled. 0 = disabled. 1 = enabled.

pub fn mr1r(&self) -> MR1R_R

Bit 4 - Reset on MR1: the TC will be reset if MR1 matches it. 0 = disabled. 1 = enabled.

pub fn mr1s(&self) -> MR1S_R

Bit 5 - Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches the TC. 0 = disabled. 1 = enabled.

pub fn mr2i(&self) -> MR2I_R

Bit 6 - Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC. 0 = disabled. 1 = enabled.

pub fn mr2r(&self) -> MR2R_R

Bit 7 - Reset on MR2: the TC will be reset if MR2 matches it. 0 = disabled. 1 = enabled.

pub fn mr2s(&self) -> MR2S_R

Bit 8 - Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches the TC. 0 = disabled. 1 = enabled.

pub fn mr3i(&self) -> MR3I_R

Bit 9 - Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC. 0 = disabled. 1 = enabled.

pub fn mr3r(&self) -> MR3R_R

Bit 10 - Reset on MR3: the TC will be reset if MR3 matches it. 0 = disabled. 1 = enabled.

pub fn mr3s(&self) -> MR3S_R

Bit 11 - Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches the TC. 0 = disabled. 1 = enabled.

pub fn mr0rl(&self) -> MR0RL_R

Bit 24 - Reload MR0 with the contents of the Match 0 Shadow Register when the TC is reset to zero (either via a match event or a write to bit 1 of the TCR). 0 = disabled. 1 = enabled.

pub fn mr1rl(&self) -> MR1RL_R

Bit 25 - Reload MR1 with the contents of the Match 1 Shadow Register when the TC is reset to zero (either via a match event or a write to bit 1 of the TCR). 0 = disabled. 1 = enabled.

pub fn mr2rl(&self) -> MR2RL_R

Bit 26 - Reload MR2 with the contents of the Match 2 Shadow Register when the TC is reset to zero (either via a match event or a write to bit 1 of the TCR). 0 = disabled. 1 = enabled.

pub fn mr3rl(&self) -> MR3RL_R

Bit 27 - Reload MR3 with the contents of the Match 3 Shadow Register when the TC is reset to zero (either via a match event or a write to bit 1 of the TCR). 0 = disabled. 1 = enabled.

Methods from Deref<Target = R<MCR_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<MCR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<MCR_SPEC>> for R

fn from(reader: R<MCR_SPEC>) -> Self

Performs the conversion.