Struct lpc845_pac::ctimer0::ctcr::SELCC_W

pub struct SELCC_W<'a> { /* fields omitted */ }

Field SELCC writer - Edge select. When bit 4 is 1, these bits select which capture input edge will cause the timer and prescaler to be cleared. These bits have no effect when bit 4 is low. Values 0x2 to 0x3 and 0x6 to 0x7 are reserved.

Implementations

impl<'a> SELCC_W<'a>

pub fn variant(self, variant: SELCC_A) -> &'a mut W

Writes variant to the field

pub fn channel_0_rising(self) -> &'a mut W

Channel 0 Rising Edge. Rising edge of the signal on capture channel 0 clears the timer (if bit 4 is set).

pub fn channel_0_falling(self) -> &'a mut W

Channel 0 Falling Edge. Falling edge of the signal on capture channel 0 clears the timer (if bit 4 is set).

pub fn channel_1_rising(self) -> &'a mut W

Channel 1 Rising Edge. Rising edge of the signal on capture channel 1 clears the timer (if bit 4 is set).

pub fn channel_1_falling(self) -> &'a mut W

Channel 1 Falling Edge. Falling edge of the signal on capture channel 1 clears the timer (if bit 4 is set).

pub fn channel_2_rising(self) -> &'a mut W

Channel 2 Rising Edge. Rising edge of the signal on capture channel 2 clears the timer (if bit 4 is set).

pub fn channel_2_falling(self) -> &'a mut W

Channel 2 Falling Edge. Falling edge of the signal on capture channel 2 clears the timer (if bit 4 is set).

pub fn channel_3_rising(self) -> &'a mut W

Channel 2 Rising Edge. Rising edge of the signal on capture channel 2 clears the timer (if bit 4 is set).

pub fn channel_3_falling(self) -> &'a mut W

Channel 2 Falling Edge. Falling edge of the signal on capture channel 2 clears the timer (if bit 4 is set).

pub fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field