Struct lpc845_pac::adc0::seq_ctrl::SYNCBYPASS_R [−][src]
pub struct SYNCBYPASS_R(_);
Expand description
Field SYNCBYPASS
reader - Setting this bit allows the hardware trigger input to bypass synchronization flip-flop stages and therefore shorten the time between the trigger input signal and the start of a conversion. There are slightly different criteria for whether or not this bit can be set depending on the clock operating mode: Synchronous mode (the ASYNMODE in the CTRL register = 0): Synchronization may be bypassed (this bit may be set) if the selected trigger source is already synchronous with the main system clock (eg. coming from an on-chip, system-clock-based timer). Whether this bit is set or not, a trigger pulse must be maintained for at least one system clock period. Asynchronous mode (the ASYNMODE in the CTRL register = 1): Synchronization may be bypassed (this bit may be set) if it is certain that the duration of a trigger input pulse will be at least one cycle of the ADC clock (regardless of whether the trigger comes from and on-chip or off-chip source). If this bit is NOT set, the trigger pulse must at least be maintained for one system clock period.
Implementations
Get enumerated values variant
Checks if the value of the field is ENABLE_TRIGGER_SYNCH
Checks if the value of the field is BYPASS_TRIGGER_SYNCH
Methods from Deref<Target = FieldReader<bool, SYNCBYPASS_A>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).
Trait Implementations
type Target = FieldReader<bool, SYNCBYPASS_A>
type Target = FieldReader<bool, SYNCBYPASS_A>
The resulting type after dereferencing.