Struct lpc845_pac::adc0::seq_ctrl::SEQ_ENA_W

pub struct SEQ_ENA_W<'a> { /* fields omitted */ }

Field SEQ_ENA writer - Sequence Enable. In order to avoid spuriously triggering the sequence, care should be taken to only set the SEQn_ENA bit when the selected trigger input is in its INACTIVE state (as defined by the TRIGPOL bit). If this condition is not met, the sequence will be triggered immediately upon being enabled. In order to avoid spuriously triggering the sequence, care should be taken to only set the SEQn_ENA bit when the selected trigger input is in its INACTIVE state (as defined by the TRIGPOL bit). If this condition is not met, the sequence will be triggered immediately upon being enabled.

Implementations

impl<'a> SEQ_ENA_W<'a>

pub fn variant(self, variant: SEQ_ENA_A) -> &'a mut W

Writes variant to the field

pub fn disabled(self) -> &'a mut W

Disabled. Sequence n is disabled. Sequence n triggers are ignored. If this bit is cleared while sequence n is in progress, the sequence will be halted at the end of the current conversion. After the sequence is re-enabled, a new trigger will be required to restart the sequence beginning with the next enabled channel.

pub fn enabled(self) -> &'a mut W

Enabled. Sequence n is enabled.

pub fn set_bit(self) -> &'a mut W

Sets the field bit

pub fn clear_bit(self) -> &'a mut W

Clears the field bit

pub fn bit(self, value: bool) -> &'a mut W

Writes raw bits to the field