Enum lpc845_pac::adc0::inten::SEQB_INTEN_A [−][src]
pub enum SEQB_INTEN_A {
DISABLED,
ENABLED,
}
Expand description
Sequence B interrupt enable.
Value on reset: 0
Variants
0: Disabled. The sequence B interrupt/DMA trigger is disabled.
1: Enabled. The sequence B interrupt/DMA trigger is enabled and will be asserted either upon completion of each individual conversion performed as part of sequence B, or upon completion of the entire B sequence of conversions, depending on the MODE bit in the SEQB_CTRL register.
Trait Implementations
Performs the conversion.