Struct lpc845_pac::adc0::flags::SEQA_INT_R [−][src]
pub struct SEQA_INT_R(_);
Expand description
Field SEQA_INT
reader - Sequence A interrupt/DMA trigger. If the MODE bit in the SEQA_CTRL register is 0, this flag will mirror the DATAVALID bit in the sequence A global data register (SEQA_GDAT), which is set at the end of every ADC conversion performed as part of sequence A. It will be cleared automatically when the SEQA_GDAT register is read. If the MODE bit in the SEQA_CTRL register is 1, this flag will be set upon completion of an entire A sequence. In this case it must be cleared by writing a 1 to this SEQA_INT bit. This interrupt must be enabled in the INTEN register.
Methods from Deref<Target = FieldReader<bool, bool>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).